Reusable On-chip Communication architecture of Modular Hardware Accelerator (HA)

Abstract

Modular Hardware Accelerator (HA) is designed for acceleration purpose which assists CPU (Central Processing Unit) in handling specific task. Modular HA capable to manage multiple engine and communicate them with core processor and main memory through the standard system on-chip (SoC) fabric architecture. The modules of modular HA are Scheduler, Storage, Workload Generator, On-Chip Communication Adapter (OCCA) and Power Management Unit (PMU). OCCA designed to be compliant to the SoC fabric architecture standard and plays an important role in the transaction and handshaking protocol with the Fabric. It responsible for communication behavior such as interface instantiation, arbitration, flow control, address and command signal decode capability, error handling, and power management function. In order to reduce the time of architecture design future usage, OCCA module has the block of reusable architecture. Furthermore, OCCA has a simple parameterize capability let the designer easy work with the different bits of control signal, command signal and data. With all the functionality of OCCA, some debug tool such as VCS and Assertion Based Verification (ABV) use for verification and simulation purpose to ensure get a correct result.