Reversible Function Synthesis of Large Reversible Functions with No Ancillary Bits Using Covering Set Partitions

Hawash, Maher; Perkowski, Marek; Bleiler, Steve; Caughman, John S.; Hawash, Amjad

doi:10.1109/itng.2011.174

Cited by 6 publications

(21 citation statements)

References 20 publications

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“…The work of [31] presents a synthesis algorithm, Covering Set Partitions (CSP) without generating garbage bits. The algorithm utilizes the inherent mathematical specifications of binary numbers to construct input sequences which are ensured to lead to valid outputs.…”

Section: Previous Workmentioning

confidence: 99%

Reversible Logic Synthesis Using Binary Decision Diagrams With Exploiting Efficient Reordering Operators

2020

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With the continuous shrinkage of transistor sizes in very large scale integrated circuits, power consumption forms a serious concern to be tackled. With their ability to allow for zero energy dissipation, reversible circuits have been considered as promising solution to meetup with low power design requirements. Moreover, advances in their synthesis methodologies can be easily applied to quantum circuits due to the inherited reversibility of the latter. Although numerous algorithms have been proposed in the literature to synthesize reversible circuits and map them into their corresponding quantum circuits, the scalability and computational effort of such algorithms form a serious concern when synthesizing large size input functions. Binary Decision Diagram-based synthesis for reversible circuits has shown great evidence in realizing reversible circuits with low quantum cost through exploiting proper reduction rules for smaller graph size. However, the order of the variables in the decision diagram impacts its overall size, and thus, the cost of its corresponding reversible circuit. While several reordering algorithms have been proposed in this manner, their direct impact on the quantum cost has not been considered. In this paper, a Binary Decision Diagram-based algorithm for reversible circuit synthesis is proposed to synthesize reversible circuits for a given Boolean function with low quantum cost through exploiting a linearized relationship between the decision diagram size and the corresponding quantum cost. Thereafter, different decision diagram reordering algorithms have been integrated with the proposed algorithm and compared in terms of their impact on the quantum cost. Experimental results show that Genetic Algorithm-based reordering for decision diagram, supported with, cycle crossover, inverse mutation, and tournament selection, results in the least quantum cost of the output circuit if compared with other algorithms due to its property in preserving the nodes of the decision diagram in their near-optimal locations during the optimiation recipe.

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Section: Previous Workmentioning

confidence: 99%

Reversible Logic Synthesis Using Binary Decision Diagrams With Exploiting Efficient Reordering Operators

2020

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“…Adding a gate should not change the previously assigned output vectors. Recently, the modification of this method has been developed by traversing the truth table according to specially constructed orderings of rows [3]. Explicit storage of truth tables has been also avoided and the data for synthesis is represented implicitly allowing for synthesis of very large functions [27].…”

Section: Main Approachesmentioning

confidence: 99%

“…Let us consider the benchmark hwb3, i.e. the function [0,2,4,5,1,6,3,7] for which the product of disjoint cycles is as follows: (1, 2, 4) (3,5,6). In total there are 12 optimal circuits for hwb3(X1,X2,X3) consisting the minimal number of 7 gates.…”

Section: Main Approachesmentioning

confidence: 99%

“…There exist very efficient methods to synthesize "linear circuits" using only these gates [2 1]. It was also observed that intermediate subcircuits with reduced Hamming Distance (HD) lead to improved solutions when some search with different min term orders [3,27] is added [23] to the method from [6]. The proposed method performs a tree search with initial node corresponding to the original circuit specification.…”

Section: New Directions In Synthesismentioning

confidence: 99%

“…Let us discuss the function from Example I. We can isolate the individual outputs as sums of minterms: XI = I(2,3,5,7), X2 = I(l,5,6,7), X3 = I (3,4,6,7). Exoring every output with its corresponding input we get functions: XIEBxI = I(2,3,4,6), X2EBX2 = I(l ,2,3,5), X3EBX3 = I(l,4,5,6).…”

Section: New Directions In Synthesismentioning

confidence: 99%

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Synthesis of reversible circuits: A view on the state-of-the-art

Kerntopf

Perkowski

Podlaski

2012

2012 12th IEEE International Conference on Nanotechnology (IEEE-NANO)

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Four main approaches to synthesis of reversible circuits are considered: cycle-based, transformation-based, ESOP-based and BDD-based as well as their advantages and disadvantages are discussed. It is indicated that the decisions in them are based on local information only what leads to very redundant designs. Suggestions for making global decisions are also presented. New directions of research are also described.Index Terms -quantum circuits, reversible logic synthesis I, INTRODUCTIONA gate (circuit) is called reversible if there is a one-to one correspondence between its input and output vectors. Research on reversible logic circuits is motivated mainly by possible applications in quantum computing. Work is in progress to efficiently use the potential of the quantum theory of computation over its classical counterpart and hence there is a need of building quantum computing hardware. Large parts of quantum circuits are built exclusively of reversible gates which should be realized in an optimal way [5, 7], Therefore, recently, synthesis of reversible logic circuits is an intensively studied area of research. During the last 10 years many new ideas and algorithms have been developed. However, the problem of finding optimal (i.e. exact minimal) or even sub-optimal design has not been solved yet in the satisfactory manner from the practical point of view. In the paper we show what is the reason that even the most successful approaches fail to solve the above formulated problem,The paper is organized as follows. Section II recalls basic concepts of reversible logic. Section III presents our point of view on main approaches to synthesis. In Section IV experimental results are described to back our evaluation of the state-of-the-art of reversible logic synthesis. Section V presents new directions in synthesis. Section VI summarizes the paper and presents suggestions for future research.

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