Reversible-Logic Design With Online Testability

Vasudevan, Dilip; Lala, P.K.; Di, Jia; Parkerson, J.P.

doi:10.1109/tim.2006.870319

Cited by 121 publications

(48 citation statements)

References 7 publications

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“…It shows that the proposed design archives less critical delay as compared with existing design [14]. The proposed parity preserving reversible design 1, design 2 has implemented using 6 and 8 gate respectively, where existing design implemented with 8 gates.…”

Section: Results and Simulationmentioning

confidence: 89%

“…4(b)). Now consider a situation where due to fault This two rail checker can be cascaded with testable block [14] The outputs q and s of one testable block forms the input 0 x and 0 y for the two-pair rail checker, and the outputs of another testable block forms the input 1 x and 1 y as shown in Fig. 4(a).…”

Section: Design Of Two Rail Checker Based On Parity Preserving Rementioning

confidence: 99%

“…The second design is realized with six new gates. Existing two-rail checker has been implemented using eight R gates [14].…”

Section: Design Of Two Rail Checker Based On Parity Preserving Rementioning

confidence: 99%

See 2 more Smart Citations

Design of Two-Rail Checker Using a New Parity Preserving Reversible Logic Gate

Sasamal¹,

Singh²,

Mohan³

2015

IJCTE

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Abstract-Reversible logic is one of the basis of future computing system that promises zero energy dissipation. It has applications in various fields such as Low power VLSI, Fault tolerant designs, quantum computing, nanotechnology, DN A computing, optical computing, cryptography and informatics. To make reversible logic circuits reliable, they must incorporate fault tolerance attribute. In this paper, we propose a new parity preserving reversible logic gate. We have proposed two optimized design of a self checking two rail checker circuit based on proposed parity preserving reversible logic gate in terms of number of gates and critical path delay. The proposed design achieves less critical delay and gates compared to the existing designs available in literature. Index Terms-Critical delay, fault tolerant, paritypreserving reversible gates, two rail checker.

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Section: Results and Simulationmentioning

confidence: 89%

Section: Design Of Two Rail Checker Based On Parity Preserving Rementioning

confidence: 99%

See 1 more Smart Citation

Design of Two-Rail Checker Using a New Parity Preserving Reversible Logic Gate

Sasamal¹,

Singh²,

Mohan³

2015

IJCTE

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“…Some propose new testable gates which are then used to construct online testable reversible circuits. In [17] three new reversible gates are proposed, two of which are used to design an online testable block and the other is used to create a checker circuit. The checker circuit compares the two parity bits produced by the online testable blocks in order to test a single bit fault.…”

Section: Related Work On Testing Of Reversible Combinationalmentioning

confidence: 99%

“…Reversible logic synthesis attempts have mostly focused on reversible combinational logic synthesis. Some of the most important but nonexhaustive work in this area is [14][15][16][17][18][19][20][21][22][23]. However, very few works have investigated reversible sequential logic synthesis.…”

Section: Introductionmentioning

confidence: 99%

First Steps in Creating Online Testable Reversible Sequential Circuits

Khan

Rice

2018

VLSI Design

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Synthesis of reversible sequential circuits is a very new research area. It has been shown that such circuits can be implemented using quantum dot cellular automata. Other work has used traditional designs for sequential circuits and replaced the flip-flops and the gates with their reversible counterparts. Our earlier work uses a direct feedback method without any flip-flops, improving upon the replacement technique in both quantum cost and ancilla inputs. We present here a further improved version of the direct feedback method. Design examples show that the proposed method produces better results than our earlier method in terms of both quantum cost and ancilla inputs. We also propose the first technique for online testing of single line faults in sequential reversible circuits.

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Bibliography

2020

Reversible and DNA Computing

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Reversible-Logic Design With Online Testability

Cited by 121 publications

References 7 publications

Design of Two-Rail Checker Using a New Parity Preserving Reversible Logic Gate

Design of Two-Rail Checker Using a New Parity Preserving Reversible Logic Gate

First Steps in Creating Online Testable Reversible Sequential Circuits

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