Review of CMOS Integrated Circuit Technologies for High-Speed Photo-Detection

Jeong, Gyu-Seob; Bae, Woorham; Jeong, Deog‐Kyoon

doi:10.3390/s17091962

Cited by 19 publications

(11 citation statements)

References 123 publications

(195 reference statements)

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“…Each sub-λ neuron uses (I) a nanophotonic photodetector such as [77] with <1fF of capacitance, (II) operate in the "near-receiverless" regime discussed in [16], i.e., a minimal gain stage, if any, between the detector and modulator such as a single inverter amplifier (see Ref. [117], [120]), and (III) the filters and modulators are instantiated efficiently using more exotic enhancement techniques [121], [122]. We utilize devices that have been empirically prototyped, but not yet scaled in foundries.…”

Section: Neural Network Hardware Comparisonmentioning

confidence: 99%

Photonic Multiply-Accumulate Operations for Neural Networks

Nahmias

Lima

Tait

et al. 2020

IEEE J. Select. Topics Quantum Electron.

237

133

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It has long been known that photonic communication can alleviate the data movement bottlenecks that plague conventional microelectronic processors. More recently, there has also been interest in its capabilities to implement low precision linear operations, such as matrix multiplications, fast and efficiently. We characterize the performance of photonic and electronic hardware underlying neural network models using multiply-accumulate operations. First, we investigate the limits of analog electronic crossbar arrays and on-chip photonic linear computing systems. Photonic processors are shown to have advantages in the limit of large processor sizes (>100 µm), large vector sizes (N > 500), and low noise precision (≤4 bits). We discuss several proposed tunable photonic MAC systems, and provide a concrete comparison between deep learning and photonic hardware using several empiricallyvalidated device and system models. We show significant potential improvements over digital electronics in energy (>10 2), speed (>10 3), and compute density (>10 2). Index Terms-Artificial intelligence, neural networks, analog computers, analog processing circuits, optical computing. I. INTRODUCTION P HOTONICS has been well studied for its role in communication systems. Fiber optic links currently form the backbone of the world's telecommunications infrastructure, vastly overshadowing the best electronic communication standards in information capacity. Light signals have many advantageous properties for the transfer of information. For one, a photonic waveguide, with diameters ranging from those in fiber (∼80 μm) to those fabricated on-chip (∼500 nm), can carry information at enormous bandwidth densities-i.e., terabits per secondwith an energy efficiency that scales nearly independent of distance. This density is possible thanks to signal parallelization in photonic waveguides, in which hundreds of high speed, multiplexed channels can be independently modulated and detected. Photonic channels also experience less distortion, jitter,

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Section: Neural Network Hardware Comparisonmentioning

confidence: 99%

Photonic Multiply-Accumulate Operations for Neural Networks

Nahmias

Lima

Tait

et al. 2020

IEEE J. Select. Topics Quantum Electron.

237

133

View full text Add to dashboard Cite

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“…Then, the input-referred noise is obtained by dividing (1) with the trans-impedance gain R as: Nowadays, in order to take advantage of the CMOS inverter in modern process technology, there has been a lot of approaches to adopt CMOS inverter into analog circuits. This paper focuses on the applications of high-speed analog circuits, and introduces three examples of that, amplifier in optical communication receivers [6,[14][15][16][17][18][19][20][21][22][23][24][25][26][27][28][29][30], high-speed clock and data buffer [13,[31][32][33][34][35][36][37][38][39][40][41], and output driver for high-speed I/O transmitter [13,40,[42][43][44][45][46][47][48][49][50].…”

Section: Cmos Inverter As An Amplifiermentioning

confidence: 99%

“…The inverter-TIA still have a similar trade-off as the passive TIA; however, the input resistance of the resistive feedback inverter is R/(1 + A), where A is the gain of the inverter. That means that the trade-off is relaxed by the factor of A. Additionally, note that there is no other path that the photo-current can flow; the gain of this TIA equals R. Readers may consult [28] for a detailed history of TIA evolution.…”

Section: Cmos Inverter As An Amplifiermentioning

confidence: 99%

CMOS Inverter as Analog Circuit: An Overview

Bae

2019

JLPEA

Self Cite

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Since the CMOS technology scaling has focused on improving digital circuit, the design of conventional analog circuits has become more and more difficult. To overcome this challenge, there have been a lot of efforts to replace conventional analog circuits with digital implementations. Among those approaches, this paper gives an overview of the latest achievement on utilizing a CMOS inverter as an analog circuit. Analog designers have found that a simple resistive feedback pulls a CMOS inverter into an optimum biasing for analog operation. Recently developed applications of the resistive-feedback inverter, including CMOS inverter as amplifier, high-speed buffer, and output driver for high-speed link, are introduced and discussed in this paper.

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“…Channel reflection, crosstalk and bandwidth are primary limitations of high-speed electrical data transfer in these systems. Optical data transfer is sought because it is not affected by reflection and crosstalk from joule heating and power dissipation [11].…”

mentioning

confidence: 99%

“…16 Experimental and simulated drain characteristics of JFET (Vgs=0)………………………………………………………………..…………….…..79[11] …”

mentioning

confidence: 99%

Integration of Electronics and Planar Waveguide Photonics in the Silicon-on-Insulator Platform

Li¹

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The overall goal of this research project is to develop new techniques for the monolithic integration of electronic and optical waveguide devices in the SOI platform. We have focused on designing and demonstrating monolithic integrated waveguide photodetectors and transimpedance amplifiers since these components will be vital to most systems. In the absence of a commercial foundry SOI technology offering conventional CMOS electronic devices integrated with photonic components, we have taken two different approaches towards the integration of amplifiers and photodetectors. First, we implemented lateral bipolar junction transistors (LBJTs) and Junction Field Effect Transistors (JFETs) in a widely used commercial foundry SOI photonics technology lacking MOS devices but offering a variety of n-and p-type ion implants intended to provide waveguide modulators and photodetectors. Based on knowledge of device doping and geometry, simple compact LBJT and JFET device models for circuit simulation were developed. These models were then used to design basic transimpedance amplifiers integrated with optical waveguides, which were fabricated along with a suite of test devices. Experimental test results for the completed structures are reported and used to refine the compact device models. The second approach has been to show how low-loss optical waveguides can be integrated in a s imple fully-depleted SOI CMOS technology used for in-house student project fabrication in the Carleton University Microfabrication Facility. In particular experimental and theoretical results are given for loss and photoresponse for Schottky diode photodetectors integrated with these waveguides. A CMOS transimpedance amplifier is also demonstrated in this technology.

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Review of CMOS Integrated Circuit Technologies for High-Speed Photo-Detection

Cited by 19 publications

References 123 publications

Photonic Multiply-Accumulate Operations for Neural Networks

Photonic Multiply-Accumulate Operations for Neural Networks

CMOS Inverter as Analog Circuit: An Overview

Integration of Electronics and Planar Waveguide Photonics in the Silicon-on-Insulator Platform

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