Review on modeling and application of chemical mechanical polishing

Abstract

<jats:title>Abstract</jats:title><jats:p>With the development of integrated circuit technology, especially after entering the sub-micron process, the reduction of critical dimensions and the realization of high-density devices, the flatness between integrated circuit material layers is becoming more and more critical. Because conventional mechanical polishing methods inevitably produce scratches of the same size as the device in metal or even dielectric layers, resulting in depth of field and focus problems in lithography. The first planarization technique to achieve application is spin on glass (SOG) technology. However, this technology will not only introduce new material layers, but will also fail to achieve the global flattening required by VLSI and ULSI technologies. Moreover, the process instability and uniformity during spin coating do not meet the high flatness requirements of the wafer surface. Also, while some techniques such as reverse etching and glass reflow can achieve submicron level regional planarization. After the critical dimension reaches 0.35 microns (sub-micron process), the above methods cannot meet the requirements of lithography and interconnect fabrication. In the 1980s, IBM first introduced the chemical mechanical polishing (CMP) technology used to manufacture precision optical instruments into its DRAM manufacturing [1]. With the development of technology nodes and critical dimensions, CMP technology has been widely used in the Front End Of Line (FEOL) and Back End Of Line (BEOL) processes [2]. Since the invention of chemical mechanical polishing, scientists have not stopped studying its internal mechanism. From the earliest Preston Formula (1927) to today’s wafer scale, chip scale, polishing pad contact, polishing pad - abrasive - wafer contact and material removal models, there are five different scale models from macro to the micro [3]. Many research methods, such as contact mechanics, multiphase flow kinetics, chemical reaction kinetics, molecular dynamics, etc., have been applied to explain the principles of chemical mechanical polishing to establish models. This paper mainly introduces and summarizes the different models of chemical mechanical polishing technology. The various application scenarios and advantages and dis-advantages of the model are discussed, and the development of modeling technology is introduced.</jats:p>

Electrolytically Ionized Abrasive-Free CMP (EAF-CMP) for Copper

“…The WE was connected to the Cu plate, the CE was a graphite rod, and the RE was a saturated calomel electrode (SCE). The equivalent weight and density of the Cu were 63.54 g/eq and 8.96 g/cm 3 , respectively. The circular exposed area between the sample and the solution was 7.79 cm 2 .…”

“…Chemical-mechanical polishing (CMP) is a semiconductor manufacturing process applied to planarize highly integrated devices [1][2][3]. It uses both chemical reactions and mechanical material removal to planarize the surface of a semiconductor.…”

Contact-Area-Changeable CMP Conditioning for Enhancing Pad Lifetime

“…In the semiconductor manufacturing process, chemical mechanical polishing (CMP) is becoming more important as the integration of semiconductor devices increases [1][2][3][4][5]. CMP is a process that involves simultaneous chemical reactions and mechanical material removal, enabling the formation of interlayer dielectrics (ILD) [6][7][8], shallow trench isolation (STI) [6,9,10], metal wiring [11][12][13][14], and metal contacts [15][16][17] through the global planarization of thin films.…”

Preliminary Study on Polishing SLA 3D-Printed ABS-Like Resins for Surface Roughness and Glossiness Reduction

“…Chemical mechanical polishing (CMP) is a hybrid machining process that flattens the surface of a material by chemical surface reactions and a mechanical material removal method using abrasive particles located on the real contact area (RCA) between a polishing pad and the material to be polished [ 1 , 2 , 3 , 4 , 5 , 6 , 7 ]. CMP is mainly used to reduce the surface roughness of electronic materials for semiconductors, and among machining processes, it is one of the most effective process used in reducing the surface roughness of materials [ 2 ].…”