Revisiting Charge Trapping/Detrapping in Flash Memories From a Discrete and Statistical Standpoint—Part II: On-Field Operation and Distributed-Cycling Effects

Abstract

I. INTRODUCTIONO N-FIELD operation of Flash memory arrays typically involves arbitrary time sequences of program/erase (P/E) cycles and idle periods, with the possibility for temperature to change within a wide range of values. The high electrical stress determined by P/E cycles on the cell tunnel oxide gives rise to charge trapping therein, impacting the array P/E performance [2]-[9] and determining threshold-voltage (V T ) instabilities when cells should instead keep their V T level, i.e., their datum, in time [7], [10]-[15]. V T instabilities come from Manuscript

Reliability of NAND Flash Memories: Planar Cells and Emerging Issues in 3D Devices

“…Moreover, as charge is trapped into the oxide during P/E cycling and detrapped in-between, a dependence on the cycling pattern arises, which complicates the development of comprehensive models. Such task began in [221,222] and developed into a full model accounting for the major experimental evidence in [223][224][225]. Figure 19 shows experimental data from a retention experiment at room temperature on a 16 nm NAND vehicle after 10 4 P/E cycles [226].…”

“…The concept of distributed cycling conditions was then proposed in [221] as a way to better emulate the real array behavior by performing either a uniform cycling over a longer time or several groups of fast cycles preceded by bake times, usually at high temperature to accelerate the charge loss. However, the previous model shows its limitations when dealing with highly non-uniform cycling patterns, calling for a more comprehensive interpretation of the trapping/detrapping physics, that was pursued in [223][224][225]227,233]. Such a model was built upon a few phenomenological assumptions: a Poisson distribution for the number of trapped electrons n t and a uniform distribution over a log-time axis of their detrapping time constant τ d .…”

“…Such a model was built upon a few phenomenological assumptions: a Poisson distribution for the number of trapped electrons n t and a uniform distribution over a log-time axis of their detrapping time constant τ d . This led to an expression for α [223,224] …”

“…In Equation (15), η ≈ 0.01 is a fitting parameter, and the expression is modified for small values of n t to avoid the divergence in ∆n t (see [224]). Typical results for the n t distribution as a function of time (fast cycling conditions, where P/E cycles are conducted before the retention test) are shown in Figure 24, left: at a given time t, because of the detrapping term 1 − e −t/τ d in Equation (14), only electrons having τ d t are detrapped, while those with τ d t are unaffected.…”

Impact of the array background pattern on cycling-induced threshold-voltage instabilities in nanoscale NAND Flash memories

“…Instabilities are mainly the result of charge detrapping from the tunnel oxide of the memory cells, giving rise to unwanted displacements of their V T during idle/bake periods [1][2][3][4][5][6][7][8]. Although the statistical nature of the detrapping process and, in turn, of the resulting V T shift (DV T ) has been clearly recognized [3,6,9,10], an average reduction of V T as time elapses is the typical feature of detrapping in Flash arrays, owing to a dominant neutralization of negative charge in the cell tunnel-oxide [3][4][5]7]. This negative DV T is particularly detrimental for multi-level devices where the increase of storage density is traded off with the reduction of noise margins [11].…”