Fabrication of low-RF loss GaN-on-Si high electron mobility transistor stacks is critical to enable competitive front-end-modules for 5G and 6G applications. The main contribution to RF losses is the interface between the III-N layer and the HR Si wafer, more specifically the AlN/Si interface. At this interface, a parasitic surface conduction layer exists in Si, which decreases the substrate effective resistivity sensed by overlying circuitry below the nominal Si resistivity. However, a clear understanding of this interface with control of the parasitic channel is lacking. In this Letter, a detailed physical and electrical description of metalorganic chemical vapor deposition-grown AlN/Si structures is presented. The presence of a SiCxNy interfacial layer is revealed, and its importance for RF losses is shown. Through C–V and I–V characterization, an increase in the C concentration of this interfacial layer is linked to the formation of negative charge at the AlN/Si interface, which counteracts the positive charge present in the 0-predose limit. The variation of the TMAl predose is shown to allow precise tuning of the C composition and, consequently, the resulting interface charge. Notably, a linear relationship between the predose and the net interface charge is observed and confirmed by the fabrication of an AlN/Si sample with close to zero net charge. In addition, a higher Dit (∼2×1012cm−2) for such compensated samples is observed and can contribute to low-RF loss. An exceptionally high effective resistivity of above 8 kΩ cm is achieved, corresponding to an RF loss below 0.3 dB/mm at 10 GHz.