Ripple Analysis and Capacitor Voltage Balancing of Five-Level Hybrid Clamped Inverter (5L-HC) for Medium-Voltage Applications

Abstract

The five-level hybrid clamped inverter (5L-HC) is a promising new topology for medium-voltage applications. However, to minimize the capacitors and ensure good performance of the converter, capacitor voltage ripples, as well as voltage balancing control, need further study. Based on carrierphase-shift PWM (CPS-PWM), this paper gives a rigorous analysis of the ripple characteristics of all the capacitors (which consist of three groups: the flying capacitors, the central dc capacitor, and the upper and lower dc capacitors) under both normal and unbalanced operating conditions. The results can serve as a guide for the optimal design of the capacitors. First, as for the balancing issue, a self-balancing mechanism of the central dc capacitor, which is similar to the better-known self-balancing feature of the flying capacitors, is revealed. Then, a new voltage balancing strategy is proposed for these two groups of capacitors to cope with disturbances arising from various nonideal factors. For the upper and lower dc capacitors, which suffer from intrinsic imbalance, this paper proposes a better method to calculate the optimal zero-sequence voltage (ZSV), which is to be injected to achieve the balancing objective. In this paper, the ripple analysis and balancing strategy proposed are verified with simulations and experiments. INDEX TERMS Five-level hybrid clamped inverter (5L-HC), capacitor voltage ripples, voltage balancing, ripple suppression.

A three‐phase inverter circuit using half‐bridge cells and T‐NPC for medium‐voltage applications

“…Table 2 clearly shows that the proposed topology avoids the use of FCs, which are required in an FC inverter 9 and other circuit configurations reported in previous studies. [16][17][18][19][20]31 The avoidance of FCs eliminates additional voltage sensors and reduces the ripple content in the output voltage waveforms. The complexity in the operation of the circuit is reduced due to the lower number of devices.…”

“…19 This topology has the additional advantage of increasing the DC-bus utilization. Contrary to it, this configuration also requires additional voltage sensors to control the FC voltages similar to Wang et al 17 and Karthik and Loganathan. 18 Therefore, an optimized topology with reduced switch count using novel basic units and a T-type structure is proposed in Hota et al 20 This topology avoids the FCs and DC-link capacitors while providing an output of better quality.…”

“…The recommended topology in this paper is configured by combining the T-NPC and half-bridge cells. The proposed work contributes to the reduction of device count compared with NPC and FC 9,17,23 and the reduction of conduction losses due to a lower number of conducting switches/phase. A minimum component count VBC is chosen from Rojas et al 24 to achieve the DC-link capacitor voltage balancing.…”

“…Moreover, the requirement of a voltage sensing device in each phase of Le and Lee 15 and Dao and Lee 16 limits their applicability for a cost‐effective prototype. A 5‐L hybrid clamped (5‐LHC) converter is reported in Wang et al 17 to avoid the series‐connected switches and low‐frequency ripples of the FC voltages. These features make the converter adaptable for medium‐voltage applications.…”

“…This topology demands more capacitor and switch count; hence, it is not preferable. A 5‐L inverter based on a stacked cell approach is proposed in Karthik and Loganathan 18 , this configuration requires a smaller number of capacitors compared with Wang et al 17 But, it demands increased switch count per phase and two DC sources. A single DC‐source based 5‐L inverter using capacitor fed H‐bridges is introduced in Davis and Dey 19 .…”