Abstract:To implement arithmetic architectures there are many approaches available, some with new logic families such as Multiple-Valued-Logic (MVL) [1,2]. In this type of arithmetic systems, the signal levels in the digits are increased from a conventional two-state binary to multiple values. This feature is specially interesting for hardware implementation of neural networks, where a high number of interconnections are required between the network layers. Using a multiple-valued number system can reduce the number of… Show more
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