“…The ToR N+1 Ethernet switch, based on the destination address, forwards the data packets to the intra-NIC so that the packets are delivered to the ToR M. via the intra-cluster switch IS 2 . Another two-hops link for this inter-cluster communication is Cluster 1 ToR 1 ↔ IS 1 ↔ Cluster 1 ToR M ↔ ES M ↔ Cluster 2 ToR M. Moreover, the Ethernet switch at each ToR monitors the traffic volume of intra-cluster and inter-cluster communications by reading the destination MAC address 27 , and then accordingly assigns the adaptable optical bandwidth to the intra-cluster and inter-cluster links. Fig.…”
Section: Resultsmentioning
confidence: 99%
“…The flow model is built based on the ON/OFF period length (with/without traffic flow generating), following the data center traffic behavior descripted in ref. 27 .…”
Electrical switching based data center networks have an intrinsic bandwidth bottleneck and, require inefficient and power-consuming multi-tier switching layers to cope with the rapid growing traffic in data centers. With the benefits of ultra-large bandwidth, high-efficient cost and power consumption, switching traffic in the optical domain has been investigated to replace the electrical switches inside data center networks. However, the deployment of nanosecond optical switches remains a challenge due to the lack of corresponding nanosecond switch control, the lack of optical buffers for packet contention, and the requirement of nanosecond clock and data recovery. In this work, a nanosecond optical switching and control system has been experimentally demonstrated to enable an optically switched data center network with 43.4 nanosecond switching and control capability and with packet contention resolution as well as 3.1 nanosecond clock and data recovery.
“…The ToR N+1 Ethernet switch, based on the destination address, forwards the data packets to the intra-NIC so that the packets are delivered to the ToR M. via the intra-cluster switch IS 2 . Another two-hops link for this inter-cluster communication is Cluster 1 ToR 1 ↔ IS 1 ↔ Cluster 1 ToR M ↔ ES M ↔ Cluster 2 ToR M. Moreover, the Ethernet switch at each ToR monitors the traffic volume of intra-cluster and inter-cluster communications by reading the destination MAC address 27 , and then accordingly assigns the adaptable optical bandwidth to the intra-cluster and inter-cluster links. Fig.…”
Section: Resultsmentioning
confidence: 99%
“…The flow model is built based on the ON/OFF period length (with/without traffic flow generating), following the data center traffic behavior descripted in ref. 27 .…”
Electrical switching based data center networks have an intrinsic bandwidth bottleneck and, require inefficient and power-consuming multi-tier switching layers to cope with the rapid growing traffic in data centers. With the benefits of ultra-large bandwidth, high-efficient cost and power consumption, switching traffic in the optical domain has been investigated to replace the electrical switches inside data center networks. However, the deployment of nanosecond optical switches remains a challenge due to the lack of corresponding nanosecond switch control, the lack of optical buffers for packet contention, and the requirement of nanosecond clock and data recovery. In this work, a nanosecond optical switching and control system has been experimentally demonstrated to enable an optically switched data center network with 43.4 nanosecond switching and control capability and with packet contention resolution as well as 3.1 nanosecond clock and data recovery.
“…The resulting growth of High-Performance Computing (HPC) systems, supercomputers and data centers are increasingly reshaping the network infrastructure and the interconnection network [3], which on the other hand increased the energy consumption and cost budgets [4]. In recent years, Networks-on-Chips (NoCs) have been proposed as a methodology for simplifying and improving the design of Multiprocessor Systems-on-Chips (MPSoC) [5], [6] and [7], 3D architectures [8], routing and mapping algorithms have been proposed [9], [10], [11] and [12], Several reconfigurable ONoCs have been presented [13], [14], [15] and [16] so far. However, they either suffer from considerable area overhead and low efficiency.…”
Photonic networks and software-defined networks are two promising technologies to improve network-onchips performance, scalability, and resource utilization. Several architectures suffer from scaling limitations, high-power consumption, and noise interference drawbacks. In this paper, an enhanced photonic network-on-chip architecture called (SD-PNoC) is presented. The proposed architecture based on a hybrid hardware-software approach, and a Software-Defined Management Orchestrator (SDMO) to separate the network control and data forwarding planes. This orchestrator has hosted on the upper hardware router as a virtual layer capable of dynamic management. It reconfigures data forwarding paths and allows dynamic execution of different algorithms in real-time, as it scales the proposed topology based on both applications and the network requirements. The proposed SD-PNoC architecture, hierarchical communication protocols, and orchestrator management policies were implemented, simulated, and tested using a customized Phoenix-SIM framework in the OMNIT++ simulation environment. Numerous simulation experiments under different conditions have been performed and have proven that the performance of the proposed architecture is better than that of the conventional electronic network on chip (ENoC). Furthermore, simulation results without using the management policies showed that the latency is reduced by 46% and 25.5% for the 4x4 and 8x8 network structures, respectively. While the power consumption is reduced by 76.5% and 78.5% for the 4x4 and 8x8 network structures, respectively. Besides, the chip area is reduced by 33.4%. Moreover, simulation results of SDMO with using the management policies for the 8x8 network structures increased the enhancement of latency from 25.5% to 37.3% and the power consumption from 78.5% to approximately 80%, which assure the ability of the proposed architecture to remarkably enhance the overall performance of complex network-on-chip structures.
“…The advantages of PS include adaptive rate, higher shaping gain, and no modification to constellation diagram. Facing the actual needs of the rapid development of optical data centers interconnection, 10–12 PS technology has become one of the possible solutions.…”
A neural network (NN)‐assisted probabilistic shaping (PS) distribution matcher is proposed, in which the model is simplified by a structured optimization method. The NN algorithm can encode the information sequence, making the signal obey the Gaussian distribution, and can directly restore the received signal. In addition, the algorithm uses the novel training method at both ends of the transmitter and receiver so that the system performance is significantly improved. PS system verification experiments have been carried out under 16QAM‐DMT modulation format. Under the hard decision forward error correction (FEC) threshold of 3.8*10−3 BER, the proposed system achieves 1.1 dB improvement compared to the traditional 16QAM‐DMT system.
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