Rounding techniques for signed binary arithmetic

Abstract

This paper is concerned with the derivation of the relationship that exists between the number truncation in two's complement (TC) arithmetic and the corresponding truncation in signed-binary (SB) arithmetic. The resulting relationship is subsequently exploited and applied to the development of a pair of novel techniques for SB rounding. These techniques are then translated into algorithm suitable for two-level logic implementation. Finally, the resulting algorithms are applied to the design and implementation of a high-speed SB-kernel based TC multiply-accumulate arithmetic architecture.