SATCheck: SAT-directed stateless model checking for SC and TSO

Abstract

Writing low-level concurrent code is well known to be challenging and error prone. The widespread deployment of multi-core hardware and the shift towards using low-level concurrent data structures has moved the problem into the mainstream. Finding bugs in such code may require finding a specific bug-revealing thread interleaving out of a huge space of parallel executions. Model-checking is a powerful technique for exhaustively testing code. However, scaling model checking presents a significant challenge. In this paper we present a new and more scalable technique for model checking concurrent code, based on concrete execution. Our technique observes concrete behaviors, builds a model of these behaviors, encodes the model in SAT, and leverages SAT solver technology to find executions that reveal new behaviors. It then runs the new execution, incorporates the newly observed behavior, and repeats the process until it has explored all reachable behaviors. We have implemented a prototype of our approach in the SATCheck tool. Our tool supports both the Total Store Ordering (TSO) and Sequentially Consistent (SC) memory models. We evaulate SATCheck by testing several concurrent data structure implementations and comparing its performance to the original DPOR stateless model checking algorithm implemented in CDSChecker, the source DPOR algorithm implemented in Nidhugg, and CheckFence. Our experiments show that SATCheck scales better than previous approaches while at the same time operating on concrete executions.

Automatically comparing memory consistency models

“…Some rely on SAT solvers to discover executions [18,25,75,83], while others enumerate them explicitly [10,12,16,60,67,68]. Our work tackles, in a sense, the 'inverse' problem: we start with executions that witness interesting MCM properties, and go on to produce programs that can give rise to these executions.…”

Automatically comparing memory consistency models

“…5) gather threads into groups 23 24 . Some PTX fences (membar.gl) have whole-device scope 25 , and others (membar.cta) have only workgroup scope. There are no nonatomic locations 26 , sequencing is total within each thread 27 , and we do not consider RMWs 28 .…”

A Sequentialization Procedure for Fault-Tolerant Protocols

“…Moreover, we define a sequentialization procedure that uncovers bugs which are not found by state-of-the art testing tools for asynchronous protocols. There are many verification and testing tools for sequential programs and shared memory systems [20,21], that could be applied on the sequentialization computed by our method, contrary to the output of [12,19], where tools for distributed synchronous protocols are not available.…”