Scalable Adaptive NUMA-Aware Lock

Zhang, Mingzhe; Chen, Haibo; Cheng, Luwei; Lau, Francis C. M.; Wang, Cho‐Li

doi:10.1109/tpds.2016.2630695

Cited by 10 publications

(3 citation statements)

References 27 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Delegation locks [37,38,41,50,53,55,61] reduce the data movement by executing all critical sections in one core (the lock server), which significantly improves the throughput in NUMA. Although placing the lock server on big cores can hide the weak computing capacity of little cores (similar to [43,44,56], but big cores are dedicated for acceleration), it requires the big cores busy polling, which wastes a big core and violates the energy target when the contention is low.…”

Section: Related Workmentioning

confidence: 99%

Asymmetry-aware Scalable Locking

Liu¹,

Gu²,

Tang³

et al. 2021

Preprint

Self Cite

View full text Add to dashboard Cite

The pursuit of power-efficiency is popularizing asymmetric multicore processors (AMP) such as ARM big.LITTLE, Apple M1 and recent Intel Alder Lake with big and little cores. However, we find that existing scalable locks fail to scale on AMP and cause collapses in either throughput or latency, or both, because their implicit assumption of symmetric cores no longer holds. To address this issue, we propose the first asymmetry-aware scalable lock named LibASL. LibASL provides a new lock ordering guided by applications' latency requirements, which allows big cores to reorder with little cores for higher throughput under the condition of preserving applications' latency requirements. Using LibASL only requires linking the applications with it and, if latency-critical, inserting few lines of code to annotate the coarse-grained latency requirement. We evaluate LibASL in various benchmarks including five popular databases on Apple M1. Evaluation results show that LibASL can improve the throughput by up to 5 times while precisely preserving the tail latency designated by applications.

show abstract

Section: Related Workmentioning

confidence: 99%

Asymmetry-aware Scalable Locking

Liu¹,

Gu²,

Tang³

et al. 2021

Preprint

Self Cite

View full text Add to dashboard Cite

show abstract

“…This category includes lock algorithms implementing mechanisms that detect situations in which a lock needs to adapt itself, for example to cope with changing levels of contention (i.e., how many threads concurrently attempt to acquire a lock), or to avoid lock-related pathological behaviors (e.g., preemption of the lock holder to execute a thread waiting for the lock). This category includes MCS-TimePub 4 [46], GLS [9], SANL [98], LC [52], AHMCS 5 [21] and so-called Malthusian algorithms like Malth_Spin and Malth_STP 6 [30].…”

Section: Categorizing Lock Algorithmsmentioning

confidence: 99%

“…The work by Lim et al [60] considers switching among three lock algorithms (TTAS, MCS and a delegation-based one), depending on the level of contention on the lock instance. SANL [98] switches between local and remote (i.e., delegation-based) locking schemes. As explained in Section 2, delegation-based algorithms require critical sections to be expressed as a form of closure, which is incompatible with our transparent approach (i.e., without source code modification).…”

Section: Adaptive Algorithmsmentioning

confidence: 99%

Lock–Unlock

Guerraoui

Guiroux

Lachaize

et al. 2018

ACM Trans. Comput. Syst.

View full text Add to dashboard Cite

A plethora of optimized mutex lock algorithms have been designed over the past 25 years to mitigate performance bottlenecks related to critical sections and locks. Unfortunately, there is currently no broad study of the behavior of these optimized lock algorithms on realistic applications that consider different performance metrics, such as energy efficiency and tail latency. In this article, we perform a thorough and practical analysis of synchronization, with the goal of providing software developers with enough information to design fast, scalable, and energy-efficient synchronization in their systems. First, we perform a performance study of 28 state-of-the-art mutex lock algorithms, on 40 applications, on four different multicore machines. We consider not only throughput (traditionally the main performance metric) but also energy efficiency and tail latency, which are becoming increasingly important. Second, we present an in-depth analysis in which we summarize our findings for all the studied applications. In particular, we describe nine different lock-related performance bottlenecks, and we propose six guidelines helping software developers with their choice of a lock algorithm according to the different lock properties and the application characteristics. From our detailed analysis, we make several observations regarding locking algorithms and application behaviors, several of which have not been previously discovered: (i) applications stress not only the lock–unlock interface but also the full locking API (e.g., trylocks, condition variables); (ii) the memory footprint of a lock can directly affect the application performance; (iii) for many applications, the interaction between locks and scheduling is an important application performance factor; (vi) lock tail latencies may or may not affect application tail latency; (v) no single lock is systematically the best; (vi) choosing the best lock is difficult; and (vii) energy efficiency and throughput go hand in hand in the context of lock algorithms. These findings highlight that locking involves more considerations than the simple lock/unlock interface and call for further research on designing low-memory footprint adaptive locks that fully and efficiently support the full lock interface, and consider all performance metrics.

show abstract

A scalable lock on NUMA multicore

Yao

2020

Concurrency and Computation

View full text Add to dashboard Cite

Modern NUMA multicore architectures exhibit complicated memory behavior, such as cache coherence invalidation and nonuniform memory access where the access from a core to its local memory is significantly faster than crossnode access to memory on a different NUMA node. The complicated memory behavior has a large impact on the efficiency of locking synchronization, which affects the performance of parallel applications. Prior works offer several efficient designs to improve locking performance such as delegation schemes. However, the existing delegation schemes either occupy computing cores or provide nonscalable performance, or offer less portability. In this work, we present a NUMA-aware delegation lock that occupies no cores while offering scalable performance under high contention for NUMA multicore machines. The new lock is a variant of an efficient FFWD lock, and inherits its performance features, such as buffering responses within a NUMA node to minimize cache coherence traffic. Unlike FFWD, the new lock employs hierarchical NUMA-aware memory allocation and NUMA-aware dynamic server thread technique, to reduce crossnode communication between client and server threads. Our evaluation shows that the new lock outperforms FFWD under high contention, achieving the significant performance gains when compared with other state-of-the-art locks.

show abstract

Scalable Adaptive NUMA-Aware Lock

Cited by 10 publications

References 27 publications

Asymmetry-aware Scalable Locking

Asymmetry-aware Scalable Locking

Lock–Unlock

A scalable lock on NUMA multicore

Contact Info

Product

Resources

About