Low power system inertia in power electronics-dominated grids is a widely discussed problem. Power synchronization allows to emulate inertia by means of the active power low-pass filter, slowing down the grid frequency excursions. Nevertheless, inertia emulation during grid disturbances results in high energy exchange with the dc-link, which brings large dc voltage excursions. When the dc voltage dips below the ac line voltage peak, the modulation index can become too high and make the converter unable to produce the requested ac voltage. The consequent saturation of the voltage can cause current control wind-up, harmonic distortion and loss of controllability. Moreover, when the reference voltage is saturated, the converter does not behave anymore according to the power synchronization control law, making the conventional stability analyses not valid. Despite the relevance of these issues, a systematic analysis about the voltage saturation induced by grid disturbances in power converters is still missing. For that, this paper proposes a mathematical tool based on Bode plots. The target of this tool is to properly chose the converter parameters in order to tolerate grid disturbances without reaching the voltage saturation. Simulations and experiments are provided.