Scan Testing for Complete Coverage of Path Delay Faults with Reduced Test Data Volume, Test Application Time, and Hardware Cost

Xiang, Dong; Chakrabarty, Krishnendu; Hu, Dianwei; Fujiwara, Hideo

doi:10.1109/ats.2007.4388034

Cited by 1 publication

(2 citation statements)

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“…Scan forest was proposed to reduce test data volume and test application cost for stuck-at fault testing [Xiang et al 2007a]. Xiang et al [2007b] proposed a new scan architecture to compress test data and compact test responses in enhanced scan testing. Most recently, Wu et al [2009] proposed a new method to overcome the launch-induced yield loss in the linear-decompressor-based test data compression environment for LOC delay testing.…”

Section: Introductionmentioning

confidence: 99%

“…The new scan architecture is suitable for transition fault, path delay fault, and timing-based small delay defect testing. We have used scan forest to compress test data for stuckat tests [Xiang et al 2007a] and reduce test power [Xiang et al 2007b]; however, the scheme to group scan flip-flops for LOC delay testing is completely different. The scan architecture in Xiang et al [2007a] and Xiang et al [2007b] cannot be applied to LOC delay testing directly.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Scan Flip-Flop Grouping to Compress Test Data and Compact Test Responses for Launch-on-Capture Delay Testing

Xiang

Chen

Wang

2012

ACM Trans. Des. Autom. Electron. Syst.

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Test data compression is a much more difficult problem for launch-on-capture (LOC) delay testing, because test data for LOC delay testing is much more than that of stuck-at fault testing, and LOC delay fault test generation in the two-frame circuit model can specify many more inputs. A new scan architecture is proposed to compress test stimulus data, compact test responses, and reduce test application time for LOC delay fault testing. The new scan architecture merges a number of scan flip-flops into the same group, where all scan flip-flops in the same group are assigned the same values for all test pairs. Sufficient conditions are presented for including any pair of scan flip-flops into the same group for LOC transition, non-robust path delay, and robust path delay fault testing. Test data for LOC delay testing based on the new scan architecture can be compressed significantly. Test application time can also be reduced greatly. Sufficient conditions are presented to construct a test response compactor for LOC transition, non-robust, and robust path delay fault testing. Folded scan forest and test response compactor are constructed for further test data compression. Sufficient experimental results are presented to show the effectiveness of the method.

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Section: Introductionmentioning

confidence: 99%