SecNVM: An Efficient and Write-Friendly Metadata Crash Consistency Scheme for Secure NVM

Abstract

Data security is an indispensable part of non-volatile memory (NVM) systems. However, implementing data security efficiently on NVM is challenging, since we have to guarantee the consistency of user data and the related security metadata. Existing consistency schemes ignore the recoverability of the SGX style integrity tree (SIT) and the access correlation between metadata blocks, thereby generating unnecessary NVM write traffic. In this article, we propose SecNVM, an efficient and write-friendly metadata crash consistency scheme for secure NVM. SecNVM utilizes the observation that for a lazily updated SIT, the lost tree nodes after a crash can be recovered by the corresponding child nodes in NVM. It reduces the SIT persistency overhead through a restrained write-back metadata cache and exploits the SIT inter-layer dependency for recovery. Next, leveraging the strong access correlation between the counter and DMAC, SecNVM improves the efficiency of security metadata access through a novel collaborative counter-DMAC scheme. In addition, it adopts a lightweight address tracker to reduce the cost of address tracking for fast recovery. Experiments show that compared to the state-of-the-art schemes, SecNVM improves the performance and decreases write traffic a lot, and achieves an acceptable recovery time.

Efficient Integrity-Tree Structure for Convolutional Neural Networks through Frequent Counter Overflow Prevention in Secure Memories

“…In order to ensure the security of the main memory, integrity and confidentiality must be satisfied [9][10][11][12]. Confidentiality is achieved by encrypting data going from the processor to the external untrusted area.…”

“…Integrity ensures that the main memory correctly returns the last written data block to any address. An integrity tree is used to satisfy integrity and prevent replay attacks [9][10][11][12]. In counter-mode encryption, counters are managed by an integrity tree, where a memory write increases the corresponding counter.…”