Second-order sigma-delta modulation for digital-audio signal acquisition

Brandt, Brian; Wingard, Drew; Wooley, B.A.

doi:10.1109/4.75064

Cited by 76 publications

(17 citation statements)

References 24 publications

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“…The power consumed by the operational amplifier in the first integrator stage of a practical oversampled A/D converter is usually considerably greater than that predicted by (6). This is a consequence of the impact of various nonidealities, such as amplifier noise and the presence of higher order poles, that were not considered in the above analysis.…”

Section: B Performance Tradeoffs In First Integratormentioning

confidence: 89%

“…If the oversampling ratio is chosen such that technology limitations do not dictate an increase in power dissipation, then expression (3) for the power dissipation in the first integrator, assuming double sampling, can further be simplified to (6) To obtain this equation, it was assumed that the modulator's dynamic range (DR) is limited by noise in the first integrator and that the inband noise power introduced by the first integrator stage is given by (7) where is the oversampling ratio. The dynamic range is defined as the ratio of the power in a full-scale sinusoid to the inband noise power, given by (7).…”

Section: B Performance Tradeoffs In First Integratormentioning

confidence: 99%

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A 2.5-V sigma-delta modulator for broadband communications applications

Vleugels¹,

Rabii²,

Wooley³

2001

IEEE J. Solid-State Circuits

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128

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Oversampled sigma-delta (61) modulators offer numerous advantages for the realization of high-resolution analogto-digital (A/D) converters. This paper explores how oversampling and feedback can be employed in high-resolution 61 modulators to extend the signal bandwidth into the range of several megahertz when the oversampling ratio is constrained by technology limitations. A 2-2-1 cascaded multibit architecture suitable for operation from a 2.5-V power supply is presented, and a linearization technique referred to as partitioned data weighted averaging is introduced to suppress in-band digital-to-analog converter (DAC) errors. An experimental prototype based on the proposed topology has been integrated in a 0.5-m double-poly triple-metal CMOS technology. Fully differential double-sampled switched-capacitor integrators enable the modulator to achieve 95-dB dynamic range at a 4-Msample/s Nyquist conversion rate with an oversampling ratio of 16. The experimental modulator dissipates 150 mW from a 2.5-V supply.Index Terms-Analog-to-digital conversion, CMOS analog integrated circuits, double sampling, dynamic element matching, integrated circuit design, mixed analog-digital integrated circuits, sampled-data circuits, sigma-delta modulation, switched-capacitor circuits.

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Section: B Performance Tradeoffs In First Integratormentioning

confidence: 89%

Section: B Performance Tradeoffs In First Integratormentioning

confidence: 99%

A 2.5-V sigma-delta modulator for broadband communications applications

Vleugels¹,

Rabii²,

Wooley³

2001

IEEE J. Solid-State Circuits

Self Cite

128

View full text Add to dashboard Cite

show abstract

“…Previous studies [3][4][5] have showed that a second-order modulator is a suitable architecture for converting low-frequency signals to the digital domain. The second-order architecture is preferred to the simpler first-order one because it is less sensitive to the correlation between the input and the quantization noise, which reduces the presence of pattern dependent noise for certain dc input signals [6].…”

Section: Analog Sectionmentioning

confidence: 99%

A wireless RF CMOS mixed-signal interface for soil moisture measurements

Morais

Valente

Couto

et al. 2004

Sensors and Actuators A: Physical

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This paper describes a wireless RF CMOS interface for soil moisture measurements. The interface basically comprises a Delta-Sigma ( ) modulator for acquiring an external sensor signal, and a RF section where data is transmitted to a local processing unit. The modulator is a single-bit, second-order modulator and it is implemented using switched-capacitors techniques in a fully-differential topology. With a sampling frequency of 423.75 kHz and an oversampling ratio (OSR) of 256, the modulator achieves a dynamic range of 98.7 dB (16.1 bit). The output of the modulator is applied to a counter, as a first-order decimation filter, and the result is stored. Prior to transmission, data is encoded as a pulse width modulated signal and assembled in a frame containing preamble and checksum control fields. This frame is then transmitted through a power amplifier operating at 433.92 MHz in class-E mode. To evaluate the modulator performance, the bitstream was acquired and transferred to a personal computer to perform digital filtering and decimation using MATLAB. The soil moisture sensor is based on dual-probe heat-pulse (DPHP) method and is implemented by using an integrated temperature sensor and a heater. After applying a heat-pulse for a fixed period of time, the temperature rise, that is a function of soil moisture, generates a differential voltage that is amplified and applied to the mixed-signal interface input. The described interface can also be used with other kinds of environmental sensors in a wireless sensors network. The CMOS mixed-signal interface has been implemented in a single-chip using a standard CMOS 0.7 m process (AMI C07M-A, n-well, 2 metals and 1 poly).

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“…A 2nd-order R-D modulator, with two integrators, one mechanical and one electrical, not only provides a digital output, but also relaxes the accuracy requirements on the analog circuits. In micromechanical accelerometers, since the mechanical bandwidth is usually quite small (\2 kHz), sigma-delta conversion can effectively reduce noise and improve overall performance [7][8][9][10][11].…”

Section: Introductionmentioning

confidence: 99%

A high performance Σ-Δ readout circuitry for μg resolution microaccelerometers

Ocak

Kepenek

Külah

et al. 2009

Analog Integr Circ Sig Process

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This paper reports a second order electromechanical sigma-delta readout for micro-g resolution accelerometers in addition to other high-sensitivity capacitive microsensors with large base capacitance. The chip implements a switched-capacitor readout front-end and an oversampled sigma-delta modulator, and hence can be used for both open-loop analog readout and closed-loop control and readout with direct digital output. The readout circuit has more than 115 dB dynamic range and can resolve less than 3 aF/HHz. Also this IC includes start-up circuit and feedback mechanism for closed-loop control of the accelerometer with a single 5 V supply in a ±4 g range. Together with the accelerometer, bandwidth of the overall system is limited with the sensor resonance frequency (1.53 kHz) in the open-loop mode. However in closed loop mode, oversampling of the acceleration data increases the bandwidth of the system up to few hundred kilohertz which is limited with the cut-off frequency of the low-pass filter placed at the output of the system. The start-up circuit allows rebalancing of a thick silicon proof mass with the limited 5 V supply after system start from power down or in the case of over-range input acceleration. The readout chip has been combined with a Silicon-On-Glass lateral accelerometer, which has a high sensitivity of 1.88 pF/g with large proof mass and long finger structures. A digital filtration and decimation circuitry is also implemented to signal process the output bit stream of the readout circuit. The complete module consumes 16 mW from a ±2.5 V supply and has an adjustable sensitivity up to 8 V/g with a noise level of 4.8 lg/HHz in open-loop.

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Second-order sigma-delta modulation for digital-audio signal acquisition

Cited by 76 publications

References 24 publications

A 2.5-V sigma-delta modulator for broadband communications applications

A 2.5-V sigma-delta modulator for broadband communications applications

A wireless RF CMOS mixed-signal interface for soil moisture measurements

A high performance Σ-Δ readout circuitry for μg resolution microaccelerometers

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