Segmented alignment mark optimization and signal strength enhancement for deep trench process

Cui, Yanmei; Goodwin, Frank; Haren, Richard van

doi:10.1117/12.532896

Cited by 13 publications

(7 citation statements)

References 2 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…It is noted here that the scaling of alignment pitch and process segmentation requirements is not only limited to BEOL processes. Similar trends are observed in FEOL processes like the deep trench capacitor process [10,11,12], and metal-gate shallow trench isolation. Effectively the scatter bars presented in this paper could be used as marks in the FEOL processing.…”

Section: Future Worksupporting

confidence: 72%

Alignment robustness for 90 nm and 65 nm node through copper alignment mark integration optimization

Warrick¹,

Hinnen

Morton

et al. 2005

Optical Microlithography XVIII

Self Cite

View full text Add to dashboard Cite

In this paper, methods for stacking ASML scribe lane alignment marks (SPM) and improving the mark performance at initial copper metal levels are discussed. The new mark designs and the theoretical reasons for mark design and/or integration change are presented. In previous joint publications between ASML and Freescale Semiconductor [1], improved overlay performance and alignment robustness for Back End Of Line (BEOL) layers by the application of stacked scribe lane marks (SPM) was presented.In this paper, further improvements are demonstrated through the use of optimized Versatile Scribe Lane Mark design (VSPM). With the application of stacked optimized VSPM-marks, the alignment signal strength of marks in the copper metal layer is increased compared to stacked SPM marks. The gains in signal strength stability, which is typical for stacked marks, as well as significantly reduced scribe lane usage, are also maintained. Through the placement of specially designed orthogonal scatter-bars in selected layers under the VSPM-marks, the alignment performance of initial inlaid metal layers is improved as well. The integration of these marks has been evaluated for the 90 nm and 65 nm technology nodes as part of a joint development program between the Crolles2 Alliance and ASML. A measured overlay improvement of ~10-15% was obtained by a strategy change from floating copper marks to stacked optimized VSPM marks.

show abstract

Section: Future Worksupporting

confidence: 72%

Alignment robustness for 90 nm and 65 nm node through copper alignment mark integration optimization

Warrick¹,

Hinnen

Morton

et al. 2005

Optical Microlithography XVIII

Self Cite

View full text Add to dashboard Cite

show abstract

“…Figure-01 shows the mark cell size of alignment marks for the phase grating alignment sensor. It was already reported that higher diffraction order mark design was more robust using the conventional ASML mark family on various process layers [1][2][3][4][5][6]. Using new SMASH marks, however, it has not reported which diffraction order has higher robustness on our process layers, thus, it is very motive to investigate which diffraction order marks to detect for alignment with new SMASH marks on our process layers from the view point of high robustness.…”

Section: Fundamental and Mark Typesmentioning

confidence: 88%

The application of SMASH alignment system for 65-55-nm logic devices

et al. 2007

View full text Add to dashboard Cite

65-55nmLogic-Devices require high performance of not only the resolution, of but also the overlay accuracy (Mean+3sigmas < 20-30nm). Thus, here, overlay performance of several layers in our advanced devices is investigated with using Immersion-exposure-tool. We used the new alignment system called SMASH TM which has the phase grating alignment sensor newly installed in our immersion-exposure-tool (XT1400Ei). SMASH supports flexible mark design in terms of size and pitch of the grating so that it can comply for our design requirement. SMASH has much smaller alignment beam size of ~ 40um for it.New mark design for our 65-55nm process will be investigated so as to obtain higher alignment accuracy than that of current marks. The alignment performance becomes more accurate proportionally to data density of the mark and it depends on the diffraction angle and efficiency from the mark. Thus, to obtain acceptable alignment accuracy with smaller mark, it should be designed such as diffraction efficiency is maximized within the required boundary condition in the pitch [diffraction angle] and segmentation of the mark.In this paper, several new marks are designed and evaluated. The evaluation shows that comparable performance could be obtained in the new design mark as in ASML's conventional marks. Finally, we select one from the new smaller marks and apply it to our 65-55nm process, especially, to the five process modules , and performance within 20nm (Mean+3sigmas) are typically obtained. The overlay accuracy needed for our 65-55nm Logic-Devices is successfully achieved with immersion-exposure-tool. SMASH* (SMart Alignment Sensor Hybrid) : the name of alignment system using with phase grating alignment sensor.

show abstract

“…Such pure high order AA gratings lead to more alignment signal than the AH gratings, therefore such design has a significant advantage in color resist applications. Refer to [2] and [3] for earlier usage. …”

Section: Pure High Order Markmentioning

confidence: 99%

New color alignment for CMOS image sensor

et al. 2007

Self Cite

View full text Add to dashboard Cite

A new alignment mark implementation for color processing has been successfully tested in a joint activity between ASML and TOWER. Alignability and overlay performance have been proven by applying the combination of a pure high order mark design and a dual implementation using the ATHENA™ alignment sensor and a PAS5500/400 machine. By their very nature, the resists used in color filter processes will absorb light at various wavelengths. While this makes them useful as color filters, it can noticeably reduce the signal strength of pattern images as seen by lithography alignment systems. The pure high order mark design enhances the signal strength. Exposing two of such mark pairs in a Metal Last layer with two different metal plateaus (in previous metal layers: "Metal Last -1" and "Metal Last -2") leads to two different optical mark depths and therefore mimics a four wavelength alignment system with ATHENA. In principle, the evaluated technique might be extended to more (than four) "wavelengths" as well as other process layers. Moreover, the use of scribe-line marks enhances productivity since no extra lithography step is required to expose Zero Layers. The performance of this implementation has been evaluated for 180-nm CMOS Image Sensor technology. This paper discusses the overlay and alignment results of the evaluation. Alignment parameters such as absolute signal strength and signal strength variation were studied in detail. It is shown that such mark implementation shows good alignability and easily meets the product overlay requirements of Image Sensor devices.

show abstract

Segmented alignment mark optimization and signal strength enhancement for deep trench process

Cited by 13 publications

References 2 publications

Alignment robustness for 90 nm and 65 nm node through copper alignment mark integration optimization

Alignment robustness for 90 nm and 65 nm node through copper alignment mark integration optimization

The application of SMASH alignment system for 65-55-nm logic devices

New color alignment for CMOS image sensor

Contact Info

Product

Resources

About