2020 IEEE 36th International Conference on Data Engineering Workshops (ICDEW) 2020
DOI: 10.1109/icdew49219.2020.00010
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Selective Caching: A Persistent Memory Approach for Multi-Dimensional Index Structures

Abstract: After the introduction of Persistent Memory in the form of Intel's Optane DC Persistent Memory on the market in 2019, it has found its way into manifold applications and systems. As Google and other cloud infrastructure providers are starting to incorporate Persistent Memory into their portfolio, it is only logical that cloud applications have to exploit its inherent properties. Persistent Memory can serve as a DRAM substitute, but guarantees persistence at the cost of compromised read/write performance compar… Show more

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Cited by 2 publications
(6 citation statements)
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References 23 publications
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“…The competition of PMem and DRAM for free space in the CPU caches is still included here. In our initial results [17], we have shown that dynamic caching definitely gives benefits when executing the same set of queries twice (selective warm-up). Now, we query different points or ranges, but still keep a certain skewness and find that dynamic caching is no longer that significantly better.…”
Section: Optimizationsmentioning
confidence: 92%
See 3 more Smart Citations
“…The competition of PMem and DRAM for free space in the CPU caches is still included here. In our initial results [17], we have shown that dynamic caching definitely gives benefits when executing the same set of queries twice (selective warm-up). Now, we query different points or ranges, but still keep a certain skewness and find that dynamic caching is no longer that significantly better.…”
Section: Optimizationsmentioning
confidence: 92%
“…Next, we compare the throughput of the three query types for the approaches over a time course expressed in queries run up to that point. In contrast to our prior work [17], the system and caches are not warmed up before to show how the setup and its performance evolves over time. We show the results for the persistent Elf without DRAM caching, the corresponding best dynamic caching, static caching of the first x dimension levels as well as the combination of dynamic and static caches.…”
Section: Optimizationsmentioning
confidence: 99%
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“…With the LB + -Tree [22] the authors refine the concept for Intel's DCPMMs by utilizing multi-256-byte nodes and limiting the number of PMem line writes. In [13] it is shown that the selective persistence concept of the FPTree is similarly applicable to other data structures. The use case here is a persistent trie-like structure enhanced with various DRAM caching strategies.…”
Section: Multi-level Data Structuresmentioning
confidence: 99%