Selective Operation of Enhancement and Depletion Modes of Nanoscale Field-Effect Transistors

Abstract

Most of the CMOS field-effect transistors (FETs) are in enhancement mode, absence of charge carriers in the channel at zero gate voltage, to reduce power consumption. In principle, depletion mode transistors have higher currents than the enhancement mode due to ample charge carrier density. For high-frequency applications, the off-state of FET is not a mandatory requirement. Rather the presence of a channel at zero gate bias and sufficiently large saturation mobility is advantageous. Here, we demonstrate that by selecting a particular work function for a gate metal, threshold voltages of the FETs can be changed from negative to positive values that is selective switching between enhancement mode and depletion mode of the operation. The devices are fabricated with Al, Si, and Au gate metals with Au source–drain metal. Well-known p-type molecular semiconductor dinaphthothienothiophene (DNTT) is deposited by evaporation under high vacuum. It is observed that depending on the low- or high-work functions of the gate metal, the channel is absent or present at zero gate voltage. For work functions below and above 4.8 eV, the FET is in enhancement and depletion modes, respectively. We also show that this effect can be strongly observed for thin dielectrics. The experimental results are complemented by TCAD device simulations. This work will be crucial for high-frequency and precision logic-gate applications of organic as well as 2D materials devices.