Self-healing router architecture for reliable network-on-chips

Khalil, Kasem; Eldash, Omar; Bayoumi, Magdy

doi:10.1109/icecs.2017.8292030

Cited by 13 publications

(4 citation statements)

References 17 publications

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“…The managed component performs pre-determined steps when the network detects a failure of a port. [7] introduces a self-healing router architecture. Generally, self-healing router architecture requires the use of redundant routers.…”

Section: Self-healingmentioning

confidence: 99%

A study of Storage Area Networks and issues in its management

Kulkarni¹,

Bhat²

2021

JUSST

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A data center has hundreds of servers and storage devices running on virtual machines that can be deployed and migrated over servers as per the requirement. If each server uses local storage, migration of this storage and restoration is mandatory. An attempt to organize and track storage throughout the data center is quite tedious. Using a dedicated storage system like a storage array, it possible to collectively monitor and manage such a network. A storage area network is essentially a network dedicated to storage devices. A storage area network can interconnect devices in all its layers, therefore improving storage availability. Interconnecting all elements in SAN also reduces the chances of a single point of failure. Using the storage devices collectively improves their utilization. SAN offers to manage and maintain all devices in the network. Although SAN is beneficial, it has drawbacks when configuring, monitoring, and managing components in a large-scale network. This paper consolidates the problems associated with SAN and offers possible solutions to overcome them.

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Section: Self-healingmentioning

confidence: 99%

A study of Storage Area Networks and issues in its management

Kulkarni¹,

Bhat²

2021

JUSST

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“…These fault tolerant techniques disconnect the healthy cores in the network which is undesired. Khalil et al in [29] proposed a self-healing router architecture which can tolerate the transient and permanent faults. The fault detection unit available in the router can inform the neighboring routers about the faulty state.…”

Section: Related Workmentioning

confidence: 99%

Defender: A Low Overhead and Efficient Fault-Tolerant Mechanism for Reliable on-Chip Router

2019

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The ever-shrinking size of a transistor has made Network on Chip (NoC) susceptible to faults. A single error in the NoC can disrupt the entire communication. In this paper, we introduce Defender, a fault-tolerant router architecture, that is capable of tolerating permanent faults in all the parts of the router. We intend to employ structural modifications in baseline router design to achieve fault tolerance. In Defender we provide the fault tolerance to the input ports and routing computation unit by grouping the neighboring ports together. Default winner strategy is used to provide fault resilience to the virtual channel arbiters and switch allocators. Multiple routes are provided to the crossbar to tolerate the faults. Defender provides improved fault tolerance to all stages of routers as compared to the currently prevailing fault tolerant router architectures. Reliability analysis using silicon protection factor (SPF) and Mean Time to Failure (MTTF) metrics confirms that our proposed design Defender is 10.78 times more reliable than baseline unprotected router and then the current state of the art architectures.INDEX TERMS Network-on-Chip, router architecture, permanent fault tolerance, silicon protection factor, mean time to failure.

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“…Evolvable hardware mainly consists of two parts [4]: reconfigurable hardware and evolutionary algorithm. When the function of the combinational logic circuit needs to be changed, or when a fault occurs during operation and needs to be repaired [5], the EHW system begins to work. Firstly, the reconfigurable circuit would be encoded with a string of binary numbers, and then the evolutionary algorithm is used to search for feasible solutions in the solution space continuously and evaluate them.…”

Section: Introductionmentioning

confidence: 99%

Research on Evolvable Hardware Based on Improved Evolutionary Strategy

Zhu,

Tang

2023

J. Phys.: Conf. Ser.

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Evolvable hardware (EHW) attracts a lot of researchers because of its excellent adaptive and self-organizing ability. Various of studies have been carried out to improve the evolutionary efficiency. There are mainly two ways: improving the structure of reconfigurable hardware and optimizing evolutionary algorithms. In this paper, we design the reconfigurable circuit based on the systolic array which could reduce the length of circuit coding. And then, an improved evolutionary strategy is proposed, which refers to the yin-yang pair optimization algorithm (YYPO). It can accelerate the evolutionary process and avoid the stalling effect by balancing the relationship between exploration and development. Some experiments were conducted to verify the effect and the results show that the improved method has better searching ability than the traditional evolutionary strategy.

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Self-healing router architecture for reliable network-on-chips

Cited by 13 publications

References 17 publications

A study of Storage Area Networks and issues in its management

A study of Storage Area Networks and issues in its management

Defender: A Low Overhead and Efficient Fault-Tolerant Mechanism for Reliable on-Chip Router

Research on Evolvable Hardware Based on Improved Evolutionary Strategy

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