Self-rectifying resistive switching characteristics of Ti/Zr3N2/p-Si capacitor for array applications

Correlation between Sensing Accuracy and Read Margin of a Memristor-Based NO Gas Sensor Array Estimated by Neural Network Analysis

“…Then, in the case of the MIS gasistor, we observed the same bipolar RS in the I−V curves, but as shown in Figure 2c, it was performed without the electroforming process and had a selfrectifying property in reset regions due to a p-Si. 17,18 Its initial state was a high-resistance state (HRS) and the set operation to form CFs occurred at about −19 V, which resulted in the resistance changes from the HRS to the low-resistance state (LRS). On the other hand, in voltage sweeping at a positive region, the gasistor returns to the HRS, but the current remains the same as the LRS due to its self-rectifying characteristics.…”

“…To solve this, developing a memristor device with self-rectification characteristics is necessary. In particular, research is ongoing to secure rectification characteristics using semiconductors as BE. , The MIS structure can have rectification characteristics in a low-voltage region or reverse polarity voltage. This allows suppression of leakage current in the array structure, an increase of read margin, and a reduction of power consumption, as shown in Figure a.…”

“…In this study, we proposed a self-selection Zr 3 N 4 -based gasistor using the metal/insulator/semiconductor (MIS) structure rather than the MIM structure and demonstrated a current limitation in its nonlinear I−V curve, which can effectively solve two issues: disturbance with adjacent cells and reduction in operation current, while ensuring a high accuracy and an integration of the device (Figure 1c). According to the reported literature, 17,18 we can find that the p-type Si as a bottom electrode offers excellent nonlinearity and a large read margin to inhibit a leakage current in the array. As a result, we observed that the proposed self-selection gasistor array can effectively suppress the leakage current from adjacent cells and gain a larger read margin than that of the MIM structure, which allows higher accuracy and lower power consumption for NO gas, without external current compliance.…”

Integration of ZnO-Based Resistive-Switching Memory and Ge2Sb2Te5-Based Phase-Change Memory

“…In this experiment, the resistance of the middle device between [1 1] and [1 0] (working states) could be clearly distinguished, which indicated that the 1P1R structure can suppress the sneak current where PCM acted as the switching element and RRAM acted as the memory. To further investigate the sneak current suppression capability of the 1P1R device, , we calculated the read margin normalized to pull-up voltage, Δ V / V pu , where Δ V is V out,LRS – V out,HRS and V pu is the pull-up voltage, using 1/2 V read read schemes, as shown in Figure S6. The read margin decreased to below 10% for N = 4 for the normal RRAM device and for N = 67 for the 1P1R device, showing that the 1P1R structure could increase the crossbar array density.…”

Memristor Crossbar Circuit for Ternary Content‐Addressable Memory with Fine‐Tuning Operation

“…The number of required programming pulses is increased for a smaller tuning error (Figure S2, Supporting Information), and it can be reduced if memristive devices are integrated with 1S1R structure or self-rectification because a target cell can be efficiently selected by minimizing the disturbance of unselected cells. [37][38][39][40][41][42][43][44][45][46] Therefore, the ML current difference between two row electrodes can be regarded as the effective margin when 16-bit search data (a) pattern encoded by V read /0 V is applied to 32 TE lines. Figure 4b shows the programmed conductance map of the 32 Â 2 subarray with different tuning errors (40 and 10 nA), and corresponding ML current at each row electrode.…”