Self-related traces: An alternative to full-system simulation for NoCs

Triviño, Francisco Antonio García; Andújar, Francisco J.; Alfaro, Francisco J.; Sánchez, José Luis; Ros, Alberto

doi:10.1109/hpcsim.2011.5999914

Cited by 13 publications

(4 citation statements)

References 7 publications

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“…For architecture simulations, a Replay mechanism is required to process the trace and generate architectural events, as is standard in event-driven simulation [14,15,29,32,34]. The Replay mechanism dynamically generates the appropriate actions for all events during simulation while providing lightweight thread scheduling and management.…”

Section: Event-trace Replay Frameworkmentioning

confidence: 99%

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SynchroTrace

Sangaiah

Lui

Jagtap

et al. 2018

ACM Trans. Archit. Code Optim.

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Trace-driven simulation of chip multiprocessor (CMP) systems offers many advantages over execution-driven simulation, such as reducing simulation time and complexity, allowing portability, and scalability. However, trace-based simulation approaches have difficulty capturing and accurately replaying multithreaded traces due to the inherent nondeterminism in the execution of multithreaded programs. In this work, we present SynchroTrace, a scalable, flexible, and accurate trace-based multithreaded simulation methodology. By recording synchronization events relevant to modern threading libraries (e.g., Pthreads and OpenMP) and dependencies in the traces, independent of the host architecture, the methodology is able to accurately model the nondeterminism of multithreaded programs for different hardware platforms and threading paradigms. Through capturing high-level instruction categories, the SynchroTrace average CPI trace Replay timing model offers fast and accurate simulation of many-core in-order CMPs. We perform two case studies to validate the SynchroTrace simulation flow against the gem5 full-system simulator: (1) a constraint-based design space exploration with traditional CMP benchmarks and (2) a thread-scalability study with HPC-representative

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Section: Event-trace Replay Frameworkmentioning

confidence: 99%

“…Trace-based approaches have also been employed to specifically explore the CMP design space [14,15,29,34]. Most work in this space has recognized the need to establish causation between network messages to model the associated delays correctly.…”

Section: Other Efficient Modeling Solutionsmentioning

confidence: 99%

SynchroTrace

Sangaiah

Lui

Jagtap

et al. 2018

ACM Trans. Archit. Code Optim.

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“…The simulation platform is based on the Simics-GEMS simulators [14]. The NoC is modeled with a cycle-accurate flit-level network simulator.…”

Section: Performance Evaluationmentioning

confidence: 99%

NoC Reconfiguration for CMP Virtualization

Triviño

Alfaro

́nchez

et al. 2011

2011 IEEE 10th International Symposium on Network Computing and Applications

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At NoC level, the traffic interferences can be drastically reduced by using virtualization mechanisms. An effective strategy to virtualize a NoC consists in dividing the network in different partitions, each one serving different applications and traffic flows. In this paper, we propose a NoC reconfiguration mechanism to support NoC virtualization under real scenarios. Dynamic reassignment of network resources to different partitions is allowed in order to NoC dynamically adapts to application needs. Evaluation results show a good behavior of CMP virtualization.

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“…Existing works on trace capturing involve both single node and distributed cluster. Trivino et al [42] propose a self-related trace model to capture the trace for a network-on-chip (NoC) simulator, whereas other works [4,7,33] present the mechanisms to get communication traces of MPI-parallel applications. Miguel-Alonso et al [33] make use of the multi-processing environment (MPE) [25], which is a set of libraries and tools used for generating and analyzing traces of parallel applications, to get the trace files.…”

Section: Introductionmentioning

confidence: 99%

SketchDLC

Dong

et al. 2019

ACM Trans. Archit. Code Optim.

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With the fast development of deep learning (DL), the communication is increasingly a bottleneck for distributed workloads, and a series of optimization works have been done to scale out successfully. Nevertheless, the network behavior has not been investigated much yet. We intend to analyze the network behavior and then carry out some research through network simulation. Under this circumstance, an accurate communication measurement is necessary, as it is an effective way to study the network behavior and the basis for accurate simulation. Therefore, we propose to capture the deep learning communication (DLC) trace to achieve the measurement. To the best of our knowledge, we make the first attempt to capture the communication trace for DL training. In this article, we first provide detailed analyses about the communication mechanism of MXNet, which is a representative framework for distributed DL. Secondly, we define the DLC trace format to describe and record the communication behaviors. Third, we present the implementation of method for trace capturing. Finally, we make some statistics and analyses about the distributed DL training, including communication pattern, overlap ratio between computation and communication, computation overhead, synchronization overhead, update overhead, and so forth. Both the statistics and analyses are based on the trace files captured in a cluster with six machines. On the one hand, our trace files provide a sketch on the DLC, which contributes to understanding the communication details. On the other hand, the captured trace files can be used for figuring out various overheads, as they record the communication behaviors of each node.

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Self-related traces: An alternative to full-system simulation for NoCs

Abstract: The network-on-chip (NoC)

Cited by 13 publications

References 7 publications

SynchroTrace

SynchroTrace

NoC Reconfiguration for CMP Virtualization

SketchDLC

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