Self-Test in a Standard Cell Environment

Muchα, J.; Daehn, Wilfried; Gross, J.

doi:10.1109/mdt.1986.295051

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1989

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Cited by 8 publications

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Pseudorandom pattern built‐in self‐test for embedded rams

Yamada

Nakajima

1990

Systems & Computers in Japan

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The self‐test of built‐in RAMs is an excellent method to simplify the testing of VLSI. This paper considers the built‐in self‐test using the linear feedback shift registers on the pseudorandom input generator and the output signature analyzer. It is demonstrated that the method is useful in testing RAM embedded in VLSI. First, the random test required for testing the functional faults of RAM is analyzed, indicating that the random test can be applied to the embedded RAM. Then a built‐in self‐test for the embedded RAM using the linear feedback shift registers is proposed. Finally, the fault‐detection capability of the proposed test method is demonstrated by a computer simulation.

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