SHiFA

Fattah, Mohammad; Palesi, Maurizio; Liljeberg, Pasi; Plosila, Juha; Tenhunen, Hannu

doi:10.1145/2593069.2593214

Cited by 9 publications

References 39 publications

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Evolution of Publications, Subjects, and Co-Authorships in Network-on-Chip Research From a Complex Network Perspective

Wang²,

Sun

et al. 2021

IEEE Access

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The academia and industry have been pursuing network-on-chip (NoC) related research since two decades ago when there was an urgency to respond to the scaling and technological challenges imposed on intra-chip communication in SoC designs. Like any other research topic, NoC inevitably goes through its life cycle: A. it started up (2000)(2001)(2002)(2003)(2004)(2005)(2006)(2007) and quickly gained traction in its own right; B. it then entered the phase of growth and shakeout (2008)(2009)(2010)(2011)(2012)(2013) with the research outcomes peaked in 2010 and remained high for another four/five years; C. NoC research was considered mature and stable (2014-2020), with signs showing a steady slowdown. Although from time to time, excellent survey articles on different subjects/aspects of NoC appeared in the open literature, yet there is no general consensus on where we are in this NoC roadmap and where we are heading, largely due to lack of an overarching methodology and tool to assess and quantify the research outcomes and evolution. In this paper, we address this issue from the perspective of three specific complex networks, namely the citation network, the subject citation network, and the co-authorship network. The network structure parameters (e.g., modularity, diameter, etc.) and graph dynamics of the three networks are extracted and analyzed, which helps reveal and explain the reasons and the driving forces behind all the changes observed in NoC research over 20 years. Additional analyses are performed in this study to link interesting phenomena surrounding the NoC area. They include:(1) relationships between communities in citation networks and NoC subjects, (2) measure and visualization of a subject's influence score and its evolution, (3) knowledge flow among the six most popular NoC subjects and their relationships, (4) evolution of various subjects in terms of number of publications, (5) collaboration patterns and cross-community collaboration among the authors in NoC research, (6) interesting observation of career lifetime and productivity among NoC researchers, and finally (7) investigation of whether or not new authors are chasing hot subjects in NoC. All these analyses have led to a prediction of publications, subjects, and co-authorship in NoC research in the near future, which is also presented in the paper.

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Evolution of Publications, Subjects, and Co-Authorships in Network-on-Chip Research From a Complex Network Perspective

Wang²,

Sun

et al. 2021

IEEE Access

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Software-Level TMR Approach for On-Board Data Processing in Space Applications

Janson

Treudler²,

Hollstein

et al. 2018

2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits &Amp; Systems (DDECS)

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Chip Temperature Optimization for Dark Silicon Many-Core Systems

Liu

Yang

et al. 2017

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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In the dark silicon era, a fundamental problem is: given a real-time computation demand, how to determine if an on-chip multiprocessor system is able to accept this demand and to maintain its reliability by keeping every core within a safe temperature range. In this paper, a practical thermal model is described for quick chip temperature prediction. Integrated with the thermal model, we present a Mixed Integer Linear Programming (MILP) model to find the optimal task-to-core assignment with the minimum chip peak temperature. For the worst case where even the minimum chip peak temperature exceeds the safe temperature, a heuristic algorithm, called temperatureconstrained task selection (TCTS), is proposed to optimize the system performance within chip safe temperature. The optimality of the TCTS algorithm is formally proven. Extensive performance evaluations show that our thermal model achieves an average prediction accuracy of 0.0741 • C within 0.2392 ms. The MILP model reduces chip peak temperature of ∼10 • C comparing with traditional techniques. The system performance is increased by 19.8% under safe temperature limitation. Due to the satisfying scalability of our MILP formulation, the chip peak temperature is further decreased by 5.06 • C via the TCTS algorithm. The feasibility of this systematical technique is testified in a real case study as well.

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SHiFA

Cited by 9 publications

References 39 publications

Evolution of Publications, Subjects, and Co-Authorships in Network-on-Chip Research From a Complex Network Perspective

Evolution of Publications, Subjects, and Co-Authorships in Network-on-Chip Research From a Complex Network Perspective

Software-Level TMR Approach for On-Board Data Processing in Space Applications

Chip Temperature Optimization for Dark Silicon Many-Core Systems

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