Shift Power Reduction in High-Performance Clock Network Designs

Bhesaniya, Kamlesh Kishorbhai; Cherukur, Omar Sharif; Kandula, Lakshmi; Chevuri, Ravishankar; Sreenivasa, Pradeep; Padmanabhan, Anoop

doi:10.1109/itcindia62949.2024.10652198

2024 IEEE 8th International Test Conference India (ITC India) 2024

DOI: 10.1109/itcindia62949.2024.10652198

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Shift Power Reduction in High-Performance Clock Network Designs

Kamlesh Kishorbhai Bhesaniya,

Omar Sharif Cherukur,

Lakshmi Kandula

et al.

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Shift Power Reduction in High-Performance Clock Network Designs

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References 12 publications

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