Shimmer: Implementing a Heterogeneous-Reliability DRAM Framework on a Commodity Server

Abstract

In this paper, we present the implementation of a heterogeneous-reliability DRAM framework, Shimmer, on a commodity server with a fully fledged OS. Shimmer enables splitting of DRAM into multiple domains with varying reliability and allocation of data depending on their criticality. Compared to existing studies which use simulators, we consider practical restrictions stemming from the real hardware and investigate methods to overcome them. In particular, we reveal that the implementation of the heterogeneous-reliability memory framework requires disabling of the hardware memory interleaving, which results in a significant degradation of the system performance. To overcome the induced performance loss, we develop a software-based interleaving. We evaluate the performance, power and energy of the server using 35 benchmarks across three memory configurations: the baseline configuration; with disabled hardware memory interleaving and Shimmer with software-based memory interleaving. Our results show that Shimmer introduces a minor 6% performance overhead, while reducing the average DRAM power by 19.9% when memory operates under relaxed refresh rate and lowered memory supply voltage. As one of our main contributions we demonstrate that a heterogeneous-reliability framework based on Shimmer can be realized on a commodity server and save 9.1% of the total processor and memory energy.

Workload-Aware DRAM Error Prediction using Machine Learning

“…However, the level of this correlation is lower than in the case of W ER; for example, the r s for the memory access rate and P U E is 0.43, which is 35 % less than the same r s for W ER. It is noteworthy that unlike previous studies, which have indicated a strong impact of T reuse or H DP [27], [77], we obtain the highest r s for the memory access rate among all the program features when correlating it with W ER and P U E metrics.…”