The semiconductor silicon carbide (SiC) is a promising material for low-loss power devices. The development of a highly efficient strain-free process for the backside thinning of vertical power transistors is required due to its hard and brittle properties. Thus, plasma etching using high-pressure SF6 plasma was proposed, and it was found that a high-speed etching of the entire surface of a 2inch wafer at approximately 15 μm/min was possible. It was also demonstrated that the thickness of the commercially available 2inch wafer could be thinned to approximately 100 μm with only 20-min plasma etching, and larger-diameter wafers could be thinned at the same rate using the same rf power per unit area. Further, from the evaluation using commercial SiC MOSFET chips, it was confirmed that the backside thinning via this method does not affect the frontside devices.