2014
DOI: 10.1109/memc.2014.6798802
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Signal integrity: Efficient, physics-based via modeling: Return path, impedance, and stub effect control

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Cited by 31 publications
(4 citation statements)
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“…3 (c). These vertical interconnections adjust the return current path length on the ground plane, functioning as a series inductance in the feeding network [17]. The inductance values are modified according to the positions of the via posts (D1, D2).…”
Section: B Evolution Processmentioning
confidence: 99%
“…3 (c). These vertical interconnections adjust the return current path length on the ground plane, functioning as a series inductance in the feeding network [17]. The inductance values are modified according to the positions of the via posts (D1, D2).…”
Section: B Evolution Processmentioning
confidence: 99%
“…They provided the return current paths between ground plane pairs; studies had found that the insertion loss of the signal could be improved by these ground vias. In the discussion of [13], six ground vias were placed near the signal via to eliminate the via-plane coupling, and a physics-based equivalent circuit modeling approach [14,15] was introduced for the ancillary study. Those studies were based on the theoretical model at a low frequency band.…”
Section: Introductionmentioning
confidence: 99%
“…In particular, high-speed interconnect design is one of the crucial parts of real IC-package design, which is the focus of this study. The reason why it is critical is that the use of high-speed interconnect in the state-of-the-art IC package dramatically increases; however, its analysis and optimization method become more difficult and less efficient [3][4][5].As the data rate and density of the IC-package interconnect increase, the effects of parasitics such as mutual capacitance, mutual inductance, and the skin effect cannot be ignored. In the simulation, a broadband interconnect model must be adopted to successfully capture the high-frequency effect of parasitics and accurately analyze various electrical characteristics, as shown in Figure 1.…”
mentioning
confidence: 99%
“…In particular, high-speed interconnect design is one of the crucial parts of real IC-package design, which is the focus of this study. The reason why it is critical is that the use of high-speed interconnect in the state-of-the-art IC package dramatically increases; however, its analysis and optimization method become more difficult and less efficient [3][4][5].…”
mentioning
confidence: 99%