Signal type optimisation in the design of time-multiplexed DSP architectures

Abstract

When the specifications of a DSP-algorithm are made, the minimal word lengths for all signals in order to get results with acceptable accuracy, are determined. These word lengths have' an influence on the size of the interconnection hardware in thefinal design which is often ignored in the original speci$cation of the DSP-algorithm. An algorithm is presented to modify the types of the signals to match the size of the hardware they are mapped upon. The target is to minimise the cost of multiplexers and interconnect, requiredfor various type changes. The transformation allows to modify the bit-true behaviour of the system.