Silicon carbide coated silicon nanowires as robust electrode material for aqueous micro-supercapacitor

Abstract

The development of passivated silicon nanowire (SiNW) based micro-supercapacitor electrodes for on-chip applications using an environmentally benign aqueous electrolyte is reported. The SiNWs, produced by low-temperature (50 °C) electrochemical etching, corrode during charge/discharge cycling in the aqueous environment, but upon coating with a silicon carbide passivation layer, the corrosion is mitigated. The as-formed materials are in electrical contact with the substrate, requiring no additional current collector. The passivated NWs achieve capacitance values up to ∼1.7 mF/cm2 projected area (comparable to state-of-the art carbon based micro-supercapacitor electrodes), exhibit robust cycling stability, and maintain capacitive behavior over a wide range of charge/discharge rates.

Predictive coupled-cluster isomer orderings for some SinCm (m, n ≤ 12) clusters: A pragmatic comparison between DFT and complete basis limit coupled-cluster benchmarks

“…Preparation of one-dimensional Si-C binary core/shell nanowires has for some time been reported, [8][9][10][11][12][13][14][15] but only very recently was a procedure developed for obtaining highly-crystalline 2-D SiC sheets with nanometer thickness. 16 The latter achievement was inspired by earlier theoretical predictions of the stability of single-layer SiC, [17][18][19] and this exemplifies the synergy between theory and experiment that has been a common thread in many modern nanoscale materials science advancements.…”

Controlling the shell microstructure in a low-temperature-grown SiNWs and correlating it to the performance of the SiNWs-based micro-supercapacitor

“…Hence, a large thickness of the shell causes a large potential drop across it owing to its poor electrical conductivity, thereby leading to the low value of the capacitance. Though the surface area is another important factor which affects the capacitance Alper et al 2012), the inevitable dependence of capacitance on the shell's structural properties has been put before the geometrical aspects of SiNWs in this study. It can therefore be concluded that SiNWs with an amorphous shell will always result in a lower capacitance value of l-SC.…”

“…The maximum voltage limit for the electrolyte used is determined to be 1.3 V. Beyond this limit, the CV shows a Faradaic peak which is the result of decomposition of the electrolyte on the SiNWs surface. The SiNWs capacitance is calculated using the following equation (Alper et al 2012), C=2*I/v*A, where C is the capacitance per unit area, v is the scan rate, A is the SiNWs electrodes area and I=(I ? ?I -)/2.…”

“…However, this study involved a high processing temperature (600°C) for SiNWs which limited their use in lowtemperature applications such as flexible devices and onchip l-SC. To resolve this issue, a few attempts have been made for the fabrication of SiNWs directly on a silicon wafer by wet chemical etching processes (Alper et al 2012;Chatterjee et al 2014). However, with this approach, it is very difficult to fabricate a l-SC with two-electrode geometry on a single Si substrate.…”

Flexible solid-state symmetric supercapacitors based on MnO2 nanofilms with high rate capability and long cyclability

“…[1][2][3][4][5] On the basis of charge storage mechanism, SCs can be classified into electric double layer capacitors where charges are physically separated and pseudocapacitors where charges are stored chemically through Faradaic reactions. [6][7][8][9][10][11][12] Pseudocapacitors with high specific capacitance can provide more energy per unit area/volume and thus hold great promise for future applications. Metal oxides have been extensively studied as electrode materials for pseudocapacitors.…”