Silicon-organic hybrid fabrication platform for integrated circuits

Korn, D.; Alloatti, Luca; Lauermann, Matthias; Pfeifle, J.; Palmer, R.; Schindler, Philipp; Freude, W.; Koos, C.; Leuthold, Juerg; Yu, Hui; Bogaerts, Wim; Komorowska, Katarzyna; Baets, Roel; Campenhout, Joris Van; Verheyen, Peter; Wouters, Jan; Moelants, M.; Absil, P.; Secchi, Alberto; Dispenza, M.; Jazbinšek, Mojca; Günter, Peter; Wehrli, Silvan; Bossard, Martin; Zakynthinos, P.; Tomkos, Ioannis

doi:10.1109/icton.2012.6254470

Cited by 1 publication

(1 citation statement)

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“…The underlying phenomenon is a signal propagation delay—a physical limit of the propagation velocity of the electrical signal in the chip. In microelectronics, it is dominated by the resistor‐capacitor (RC) time constant . The bandwidth and the speed of the interconnect are reduced by the time required to charge a parasitic capacitance of the interconnect.…”

Section: Introductionmentioning

confidence: 99%

In‐Plane Detection of Guided Surface Plasmons for High‐Speed Optoelectronic Integrated Circuits

Panchenko

Cadusch

Avayu

et al. 2017

Adv Materials Technologies

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semiconductor technology processes [1] (such as the decrease in transistor gate dimensions) that, in turn, should lead to a corresponding increase in the frequency of logic gate switching, the speed of modern CPUs has remained relatively constant. Since the switching speed of discrete transistors can be very high, [2,3] the constraint, therefore, lies outside the logic gates and is primarily determined by metallic interconnects in integrated circuits. [4] The underlying phenomenon is a signal propagation delay-a physical limit of the propagation velocity of the electrical signal in the chip. In microelectronics, it is dominated by the resistor-capacitor (RC) time constant. [5] The bandwidth and the speed of the interconnect are reduced by the time required to charge a parasitic capacitance of the interconnect. This RC constant, therefore, defines the speed limit of the microelectronic circuit regardless of the speed of each individual logic gate. Numerous enhancements have been introduced to conventional CMOS technology such as substitution of Al interconnects with Cu [6,7] and the utilization of low-k dielectrics [8] for interlayer insulation in order to decrease the resistance and capacitance of the interconnects. Even though these changes have markedly improved the characteristics of interconnects, further developments of this technology are extremely challenging and cost-ineffective. Therefore, as the current technology is rapidly reaching its limits, a new approach is required to overcome the existing issues and build high-speed digital devices.Recent research in silicon photonics has demonstrated the potential for using light as a signal carrier, not only for long-distance communications but also for on-chip interconnects. Various optical elements such as waveguides, [9][10][11][12][13] modulators, [14][15][16][17] and filters [17,18] have been successfully integrated into microelectronic circuits. Another promising technology for signal processing, in terms of very large scale integration (VLSI), is the emerging field of plasmonics. It utilizes surface plasmons that are oscillations of the electron gas at the interface between metal and dielectric. The ability of surface plasmons to circumvent the conventional optical diffraction limit [19,20] as well as providing strong field confinement [11,21,22] opens up significant opportunities for using them to guide signals between logic gates in modern integrated circuits where small dimensions are highly desirable. Moreover, the high sensitivity of surface plasmons to the properties of surrounding media compared Constrains on the speed of modern digital integrated circuits are dominated by the metallic interconnects between logic gates. Surface plasmon polaritons have potential to overcome this limitation and greatly increase the operating speed of future digital devices. Nevertheless, an ongoing issue is the compatibility of modern planar microelectronic circuits with current methods for detecting surface plasmons. Here, a new approach to in-plane surface plasm...

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Section: Introductionmentioning

confidence: 99%