Silicon technology tradeoffs for radio-frequency/mixed-signal "systems-on-a-chip"

Abstract

Silicon technology has progressed over the last several years from a digitally oriented technology to one well suited for microwave and RF applications at a high level of integration. Technology scaling, both at the transistor and back-end metallization level, has driven this progress. CMOS technology is ideally suited for low-noise amplification and receiver applications, but the fundamental breakdown voltage is lower than that of equivalent Si/SiGe HBTs. High-quality passive devices are equally important, and improvements in metallization technology are resulting in higher quality inductors. This paper summarizes the silicon technology issues associated with RF "system-on-a-chip" applications.

Design tradeoff for SiGe 0.35‐μm BiCMOS low‐power and high figure‐of‐merit LNA

“…Figure Generally, the noise minimum NF min of an HBT is higher than that of an MOS due to the relatively higher base resistance R b of the HBT [4]. But in a practical design, as the MOS has a larger Furthermore, the HBT-MOS reveals the better power gain of at least 2.6 dB, compared to that of the MOS-MOS LNA.…”

“…Direct comparisons between the NF performance of MOS and bipolar LNAs are difficult to perform due to inevitable circuit-interaction effects, but a recent result [3] compared with a HBT amplifier under the same topology showed essentially equivalent NF at 2.4 GHz, with power dissipation roughly 20% higher in the MOS case. But the linearity discussed in [4] shows the better performance in MOS than HBT due to the MOSFET's square I-V law. However, in the CMOS process, the LNA reveals poor NF, whether in cascade two-stage or cascode topology, because the first stage of the LNA, MOS, requires increased power consumption in order to lower the whole circuit noise.…”

Demand for Power Electronic Systems and Radio-Frequency Applications

“…Fortunately, the interferences occur at other frequencies than the desired signal and can be filtered out. The amplified signal can then be passed on to be decoded in the baseband processing hardware, where synchronization and data recovery take place [24]. This functionality can be clustered into a single silicon CMOS chip.…”

Circularly polarized antenna on SOI for the 60 GHz band

“…CMOS generate high losses which deteriorate the efficiency of the antenna and thus its gain. However, the recent introduction of high resistive substrate (SOI) reduces the dielectric losses, which prove the importance of SOI for the realization of low loss TL [13]. The topology of SOI substrate is as follows, a high resistive silicon layer (>1000 ohm.cm), six metals layers, buried oxide layers and finally a passivation layer.…”