In this paper, the design and optimization of a cascaded common source four-stage millimeter wave amplifier in a 130 nm CMOS technology has been presented. First, Pi-shaped wideband impedance matching networks (IMNs) were used in the Input/Output Impedance Matching Networks (IOIMNs) and inter-stages. Next, single stubs were converted to symmetrical double stubs in the IOIMNs, and an ultra-wideband inductor replaced each stub. Ultra-wideband inductors were also used in series in the inter-stage IMNs to achieve a higher gain in the wider frequency bandwidth. Then, the impedance matrices of IOIMNs and inter-stage were calculated using Planar Circuit Analysis (PCA), which is based on the planar waveguide model and Segmentation/Desegmentation Methods (SDSMs). Finally, by optimizing the length and characteristic impedance of each segment of microstrip line in the IMNs through using an intelligent optimization algorithm in MATLAB, the excellent IMNs were designed, which resulted in an amplifier with 𝑆 11min = −25.3𝑑𝐵, 𝑆 22min = −20.6 𝑑𝐵, and 𝑆 21max = 30.5 𝑑𝐵 in the frequency range of 57-64 GHz. With this design method, in addition to incorporating the effect of discontinuities, the fringing fields at the edges of the microstrip as well as the conductor and dielectric losses, the effect of dispersion would be minimized by choosing a substrate whose thickness is much smaller than the wavelength and its relative permittivity is low.