Simple Methods for the Durability Assessment of Microelectronic Solders

Abstract

This paper presents a simple method, based on a 1-D model, that allows us to assess the impact of an essentially arbitrary thermal cycle test on the creep strain and energy dissipation in solder materials. Such tests are typically performed in order to assess the reliability and the lifetime of solders used for electrical and mechanical connection of microelectronic components. The method is applied to study the dissipated energy in terms of the stress-strain hysteresis in various solders, both lead-free as well as lead-containing. A first comparison between a full finite element study of the stress-strain hysteresis loop and the simplified approach is performed. It is shown that both lead to the same trends regarding creep strains and energy dissipation, however, the absolute values differ. For this reason a re-scaling procedure is proposed which allows to use the simplified approach for quantitative predictions.

Creep in microelectronic solder joints: finite element simulations versus semi-analytical methods

“…Once determined it can be used to calculate the accumulated strains, in particular the creep strains ε cr , so that the related damage can be assessed. Similarly, from the area enclosed by the hysteresis loop in a stress-strain-diagram, (ε cr (t) , σ (t)) , the creep energy density dissipated during one temperature cycle, W cr , can directly be read off (see [9] for details).…”

“…The 1D-model was described in a previous paper by two of the authors [9]. For this reason only the very basic facts are summarized in this section.…”

“…However, 3D simulations of solder joints involve a certain effort and they are definitely not "fast and easy" to perform. For this reason a timesaving 1D-model was suggested in [9] to replace the 3D FE-model with the following objectives:…”

Effects of electric field and pressure on the shrinkage behaviors of cylindrical pore in piezoelectric materials

“…Many small defects or some other pores are often found in smart elements so that the defects have greatly decreased the application function of various micro-devices made of piezoelectric materials. Various methods to research failure modes induced by those initial defects in piezoelectric material have been given in the study by Gerber et al (2005), Liu et al (2011), Zheng et al (2006), Mu¨ller and Hauck (2008), and Li and Kuna (2012).…”

Effects of electric and mechanical loads on the morphological evolution of a void in piezoelectric films

“…When small-scale solids are processed, some voids and other structural defects in the small-scale solid are often generated, which has detrimental effects on the function of various devices made of piezoelectric materials in engineering applications [5][6][7][8]. Many authors utilize various methods to research failure modes of piezoelectric material [9][10][11][12]. According to a research report that an open failure of the integrated circuits often occurs when a void changes its shape to form a crack-like slit [13], extensive efforts have been made to identify the mechanisms responsible for the void dynamics [14][15][16][17][18][19][20][21], such as the instability [14][15][16] and the shrinkage [17,18] of voids in a grain controlled by lattice diffusion, and the void shrinkage and growth on the planar bonding interfaces and on the planar grain boundary interface [19][20][21].…”