Simple Yet Efficient Improvements of SAT Based Bounded Model Checking

Zarpas, Emmanuel

doi:10.1007/978-3-540-30494-4_13

Cited by 5 publications

(4 citation statements)

References 12 publications

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“…No cone of influence reductions are used during benchmarking and our implementation does not contain any invariant (or any other property class) specific optimisations (left for further work). As the benchmark problems we use: (i) the systems involving PLTL specifications that we have used earlier in [18] (the VMCAI/* problems), (ii) IBM benchmarks from [27], and (iii) some systems in the standard NuSMV distribution involving LTL specifications which we could prove to be true. …”

Section: Methodsmentioning

confidence: 99%

Incremental and Complete Bounded Model Checking for Full PLTL

Heljanko¹,

Junttila²,

Latvala³

2005

Computer Aided Verification

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Abstract. Bounded model checking is an efficient method for finding bugs in system designs. The major drawback of the basic method is that it cannot prove properties, only disprove them. Recently, some progress has been made towards proving properties of LTL. We present an incremental and complete bounded model checking method for the full linear temporal logic with past (PLTL). Compared to previous works, our method both improves and extends current results in many ways: (i) our encoding is incremental, resulting in improvements in performance, (ii) we can prove non-existence of a counterexample at shallower depths in many cases, and (iii) we support full PLTL. We have implemented our method in the NuSMV2 model checker and report encouraging experimental results.

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Section: Methodsmentioning

confidence: 99%

Incremental and Complete Bounded Model Checking for Full PLTL

Heljanko¹,

Junttila²,

Latvala³

2005

Computer Aided Verification

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“…Cadence SMV [22] is used as the BDD-based model checker for verifying the abstract models. We used 3 sets of benchmarks for our experiments: the IU benchmarks [3] from Synopsys, the PJ benchmarks derived from the PicoJava processor [5], and the RB benchmarks from the IBM Formal Verification Library [23]. The value of N in LEARN-ABS was set to 25.…”

Section: Experiments Resultsmentioning

confidence: 99%

Reconsidering Cegar: learning good abstractions without refinement

Gupta

Clarke

2005 International Conference on Computer Design

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Abstraction techniques have been very successful in model checking large systems by enabling the model checker to ignore irrelevant details. Most abstraction techniques in literature are based on refinement. We introduce the notion of broken traces which capture the necessary and sufficient conditions for the existence of an error path in the abstract model. We formulate abstraction as learning the abstract model from samples of broken traces. Our iterative algorithm for abstraction-based model checking is not based on refinement and can generate the smallest abstract model that proves the property. We present an implementation of this algorithm for the verification of safety properties on gate-level net-lists with localization abstraction. Experimental results prove the viability of our techniques.

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“…These solvers are mainly based on the DPLL algorithm, which solves a formula by traversing a search tree as described in Section 2.4.1. The structure of a BMC formula makes it possible to use alternative branching methodologies during the traversal [WJHS04,Zar04], or to extend the default algorithm so that more conflict clauses can be added [Sht00,Str04]. In addition, the formulas can be simplified using different methods such as the ones in [Kue04, Vel04a] before feeding them to the solvers.…”

Section: Standard Methodsmentioning

confidence: 99%

“…Note that, interesting SAT benchmarks are available online at [Vel, DIM, SAT]. Benchmarks designed especially for BMC can also be found in [Zar05,Zar04].…”

Section: Satisfiability Problemmentioning

confidence: 99%

Bounded model checking for asynchronous concurrent systems

Rakotoarisoa¹

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Complex hardware systems become more and more ubiquitous in mission critical applications such as military, satellite, and medical to name but a few. In such applications, reliability remains a primary concern because a failure that occurs during their normal operations might produce important catastrophes like loss of life or loss of money. All these failures are often caused by minuscule bug that exists inside the software which controls the systems, or within the hardware itself. In addition, most of these systems cannot be interrupted while working, even for a few seconds a year, making it difficult to repair bugs found during their normal operations. The main purpose of this work is to build efficient verification techniques for asynchronous concurrent systems. Because of the pivotal roles these systems assume in a given application, designers of such systems must keep development and maintenance costs under control and meet nonfunctional constraints on the design of the system, such as cost, power, weight, or the system architecture by itself. But most importantly, they must assure their customer as well as the certification authorities that both the design and its implementation are correct. Otherwise, they may end up shipping unsafe systems to the market, and the consequences of this action would be catastrophic. To achieve this goal, designers need efficient methods and tools to assist them in verifying the correctness of the design. In this thesis we focus on a symbolic model checking technique called bounded model checking (BMC). BMC is a method targeted mainly at finding bugs in a system. It answers the questions whether there exists a counterexample, shorter than a given length, that violates a given property. During a BMC operation each execution path is encoded into Boolean formula, and the problem is reduced to satisfiability checking of the formula. Therefore, the operation consists mainly in constructing a Boolean formula that is satisfiable if and only if such a counterexample exists. We model our systems with transition systems (TSs). In particular, we are mainly interested in synchronized product of TSs. Since concurrent systems are formed by a combination of several components communicating between each other, synchronized product of TSs is well-suited to capture the behavior of such systems. The executions of concurrent systems are commonly modeled using the so-called interleaving execution, which allows only one single event to fire at each step. However, due to the complexity of such systems inteleaving method will not only require many steps but also generate long formulas. In this work, we adopt another approach based on breadth-first search (BFS). In a BMC operation, the translation of the model into a Boolean formula is polynomial in the size of the model, but the solving time of the Boolean formula can be exponential in the size of the formula. Therefore, our research hypothesis is that we can improve the efficiency of BMC by generating succinct formula, and by minimizing the number of necessary steps during an execution. We introduce several BMC techniques aimed at improving the efficiency of BMC for asynchronous concurrent systems. The techniques are grouped in two main parts (i) techniques for checking reachability properties and (ii) techniques for checking properties written in linear temporal logic (LTL). In addition, we also propose some methods for minimizing the number of execution steps or bound. We implemented all these methods in a BMC toolset. At the end of the dissertation, we will discuss the experimental results we obtained.

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Simple Yet Efficient Improvements of SAT Based Bounded Model Checking

Cited by 5 publications

References 12 publications

Incremental and Complete Bounded Model Checking for Full PLTL

Incremental and Complete Bounded Model Checking for Full PLTL

Reconsidering Cegar: learning good abstractions without refinement

Bounded model checking for asynchronous concurrent systems

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