Simplified Subspaced Regression Network for Identification of Defect Patterns in Semiconductor Wafer Maps

Adly, Fatima; Alhussein, Omar; Yoo, Paul D.; Al-Hammadi, Yousof; Taha, Kamal; Muhaidat, Sami; Jeong, Young-Seon; Lee, Ui-hyoung; Ismail, Mohammed

doi:10.1109/tii.2015.2481719

Cited by 80 publications

(28 citation statements)

References 23 publications

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“…However, this model can only be applied to predefined defect patterns. Adly et al [24] and Adly et al [25] employed ANN-based classifiers called simplified sub-spaced regression network and randomized general regression network to improve the WBM defect pattern classification performance. Their first proposed model [24] yielded superior and robust performance, in addition to improved computational efficiency compared with the benchmarked six methods.…”

Section: Literature Reviewmentioning

confidence: 99%

“…Adly et al [24] and Adly et al [25] employed ANN-based classifiers called simplified sub-spaced regression network and randomized general regression network to improve the WBM defect pattern classification performance. Their first proposed model [24] yielded superior and robust performance, in addition to improved computational efficiency compared with the benchmarked six methods. In the following study [25], they proposed a classification model with a bagging ensemble scheme that guaranteed relatively stable prediction accuracy and low variance.…”

Section: Literature Reviewmentioning

confidence: 99%

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Bin2Vec: A Better Wafer Bin Map Coloring Scheme for Comprehensible Visualization and Effective Bad Wafer Classification

Kim

Park

et al. 2019

Applied Sciences

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A wafer bin map (WBM), which is the result of an electrical die-sorting test, provides information on which bins failed what tests, and plays an important role in finding defective wafer patterns in semiconductor manufacturing. Current wafer inspection based on WBM has two problems: good/bad WBM classification is performed by engineers and the bin code coloring scheme does not reflect the relationship between bin codes. To solve these problems, we propose a neural network-based bin coloring method called Bin2Vec to make similar bin codes are represented by similar colors. We also build a convolutional neural network-based WBM classification model to reduce the variations in the decisions made by engineers with different expertise by learning the company-wide historical WBM classification results. Based on a real dataset with a total of 27,701 WBMs, our WBM classification model significantly outperformed benchmarked machine learning models. In addition, the visualization results of the proposed Bin2Vec method makes it easier to discover meaningful WBM patterns compared with the random RGB coloring scheme. We expect the proposed framework to improve both efficiencies by automating the bad wafer classification process and effectiveness by assigning similar bin codes and their corresponding colors on the WBM.

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Section: Literature Reviewmentioning

confidence: 99%

Section: Literature Reviewmentioning

confidence: 99%

Bin2Vec: A Better Wafer Bin Map Coloring Scheme for Comprehensible Visualization and Effective Bad Wafer Classification

Kim

Park

et al. 2019

Applied Sciences

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“…The k sample chips serve as seeds for constructing k Voronoi regions [10]. The n chips will be clustered into the k Voronoi regions.…”

Section: B) Partitioning the Wafer Maps Into Voronoi Regionsmentioning

confidence: 99%

“…In the framework of DDPfinder, each centroid point serves as a representative of its Voronoi region [10]. This will significantly reduce the size of processed data and improves the computation time.…”

Section: ) Identifying the Defective Centroid Points Of Voronoi Regimentioning

confidence: 99%

“…Al Shawish [9] introduced an algorithm that combines a neural regression-network consensus learning model with a randomization technique to classify wafer defect patterns. Adly et al [10] proposed a framework for identifying defect patterns using simplified subspaced and randomized general regressions as well as Voronoi-based data partitioning for clustering. The main limitation of the supervised neural network approach is its expensive computation time.…”

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confidence: 99%

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Clustering the Dominant Defective Patterns in Semiconductor Wafer Maps

Taha¹,

Yoo²

2018

IEEE Trans. Semicond. Manufact.

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Identifying defect patterns on wafers is crucial for understanding the root causes and for attributing such patterns to specific steps in the fabrication process. We propose in this paper a system called DDPfinder that clusters the patterns of defective chips on wafers based on their spatial dependence across wafer maps. Such clustering enables the identification of the dominant defect patterns. DDPfinder clusters chip defects based on how dominant are their spatial patterns across all wafer maps. A chip defect is considered dominant, if: (1) it has a systematic defect pattern arising from a specific assignable cause, and (2) it displays spatial dependence across a larger number of wafer maps when compared with other defects. The spatial dependence of a chip defect is determined based on the contiguity ratio of the defect pattern across wafer maps. DDPfinder uses the dominant chip defects to serve as seeds for clustering the patterns of defective chips. This clustering procedure allows process engineers to prioritize their investigation of chip defects based on the dominance status of their clusters. It allows them to pay more attention to the ongoing manufacturing processes that caused the dominant defects. We evaluated the quality and performance of DDPfinder by comparing it experimentally with eight existing clustering models. Results showed marked improvement.

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Defect pattern recognition on wafers using convolutional neural networks

Wang

Chen

2020

Quality & Reliability Eng

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In semiconductor manufacturing, wafer testing is performed to ensure the performance of each product after wafer fabrication. The wafer map is used to visualize the color-coded wafer test results based on the locations. The defects on the wafer map may be randomly distributed or form clustered patterns. The various clustered defect patterns are usually caused by assignable faults. The identification of the patterns is thus important to provide valuable hints for the root causes diagnosis. Solving the problems helps improve the manufacturing processes and reduce costs. In this study, we present a novel convolutional neural network (CNN)-based method to automatically recognize the defect pattern on wafer maps. Our method uses polar mapping before the training of CNN to transform the circular wafer map into a matrix, which can be processed within CNN architecture. This procedure also reduces the input size and solves variations in wafer sizes and die sizes. To eliminate the effects of rotation, we apply data augmentation in the training of CNN. Experiments using the real-world dataset prove the effectiveness and superiority of our method.

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Simplified Subspaced Regression Network for Identification of Defect Patterns in Semiconductor Wafer Maps

Cited by 80 publications

References 23 publications

Bin2Vec: A Better Wafer Bin Map Coloring Scheme for Comprehensible Visualization and Effective Bad Wafer Classification

Bin2Vec: A Better Wafer Bin Map Coloring Scheme for Comprehensible Visualization and Effective Bad Wafer Classification

Clustering the Dominant Defective Patterns in Semiconductor Wafer Maps

Defect pattern recognition on wafers using convolutional neural networks

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