2004
DOI: 10.1002/sia.1814
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SIMS investigation of the influence of Ge pre‐deposition on the interface quality between SiC and Si

Abstract: SiC/Si(111) heterostructures formed by using an alternative method for stress relaxation were investigated by SIMS and AES. The applied stress reduction method is based on a theoretical approach, which predicts an improvement of the SiC layer quality if Group IV elements are incorporated into the interface between SiC and Si. Germanium was chosen to test this approach. The incorporation of Ge into the heterointerface was carried out by depositing different amounts of Ge prior to the SiC growth process and vary… Show more

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Cited by 13 publications
(10 citation statements)
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References 14 publications
(11 reference statements)
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“…This is a further indication for an improved sharpness of the SiC/Si interface compared to the 0 and 2 ML cases. A similar effect on the interface width was found in the case of carbonization and subsequent 3C-SiC epitaxial growth on Ge modified silicon substrates, [57] where it was shown that a Ge pre-coverage in the range of 0.5 to 1.0 ML leads to a reduction of the SiC/Si interface width. An additional fact confirming the improvement of the interface properties can be found in ref.…”
Section: C-ge-si Layer With Sic Formationsupporting
confidence: 68%
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“…This is a further indication for an improved sharpness of the SiC/Si interface compared to the 0 and 2 ML cases. A similar effect on the interface width was found in the case of carbonization and subsequent 3C-SiC epitaxial growth on Ge modified silicon substrates, [57] where it was shown that a Ge pre-coverage in the range of 0.5 to 1.0 ML leads to a reduction of the SiC/Si interface width. An additional fact confirming the improvement of the interface properties can be found in ref.…”
Section: C-ge-si Layer With Sic Formationsupporting
confidence: 68%
“…For this purpose, Ge [42][43][44][45][46][47][48][49][50][51][52][53][54][55] or antimon (Sb) [56] were applied to improve the 3C-SiC nucleation and the 3C-SiC interface quality. In previous works, [57][58][59][60][61][62][63] it has been demonstrated that, if Ge impurity was predeposited onto the Si surface prior to the carbonization, the residual stress inside the 3C-SiC layer, as well as the reverse currents of the SiC/Si heterojunction and the void density at the interface can be significantly reduced. In addition to the aforementioned results, it has been shown that by introducing Ge, the crystalline quality could be improved.…”
Section: Introductionmentioning
confidence: 99%
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“…HREM observations indicate that C and Ge atoms inside the Si substrate at the SiC/Si interface are interstitially located, since Si lattice planes show similar spacings to those measured in the relaxed bulk Si substrate. Other complementary theoretical [4] and experimental [11] studies propose that the new phase corresponds to a Si 1-x-y C x Ge y solid solution. 4 Conclusions A multitechnique study has been carried out to investigate β-SiC(111)//Si(111) heterostructures fabricated by predepositing 1ML of Ge at different temperatures.…”
Section: Tem Measurementsmentioning
confidence: 96%
“…As a consequence, degraded electrical properties of the grown SiC layer and the SiC/Si heterojunction are observed. As shown previously, the interdiffusion can be reduced or suppressed if germanium is deposited prior to the SiC growth, [7,8] and the electrical properties of the SiC/Si heterojunction improves. [3] In this article we report on the effect of Ge predeposition on the early stages of the SiC formation by carbonization, as investigated by spectroscopic methods.…”
Section: Introductionmentioning
confidence: 63%