2008
DOI: 10.1016/j.jal.2007.04.001
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Simulating Turing machines on Maurer machines

Abstract: In a previous paper, we used Maurer machines to model and analyse micro-architectures. In the current paper, we investigate the connections between Turing machines and Maurer machines with the purpose to gain an insight into computability issues relating to Maurer machines. We introduce ways to simulate Turing machines on a Maurer machine which, dissenting from the classical theory of computability, take into account that in reality computations always take place on finite machines. In one of those ways, multi… Show more

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Cited by 6 publications
(7 citation statements)
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“…In [BM05b,BM06c], we extend the theory developed in this paper with features to cover systems that consist of several multi-threaded programs on various hosts in different networks. Our work on a formal approach to design new micro-architectures, see [BM07a,BM05a,BM06a,BM06b], is a notable application of thread algebra. The approach is based on Maurer's model for computers [Mau66,Mau06], thread algebra and program algebra [BL02].…”
Section: Discussionmentioning
confidence: 99%
“…In [BM05b,BM06c], we extend the theory developed in this paper with features to cover systems that consist of several multi-threaded programs on various hosts in different networks. Our work on a formal approach to design new micro-architectures, see [BM07a,BM05a,BM06a,BM06b], is a notable application of thread algebra. The approach is based on Maurer's model for computers [Mau66,Mau06], thread algebra and program algebra [BL02].…”
Section: Discussionmentioning
confidence: 99%
“…In this paper, we have carried on the line of research that has already resulted in [8][9][10]. We pursue with this line of research the object to develop an approach to design new micro-architectures that allows for their correctness and anticipated speed-up results to be verified.…”
Section: Discussionmentioning
confidence: 99%
“…In [8][9][10], the interface of a Maurer machine did not include an atomic action concurrency relation. Its inclusion is needed to be able to determine the correctness of any program parallelization statically.…”
Section: The Members Of a Are Called The Atomic Actions Of H And [[mentioning
confidence: 99%
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“…that there will always come a next turn for all active threads, multi-threads, etc. For the single-level case, a mathematically precise definition of a fair interleaving strategy is given in [8].…”
Section: ( (Nv))mentioning
confidence: 99%