Simulation analysis of 51-level inverter topology with reduced switch count

Thiyagarajan, V.

doi:10.1016/j.matpr.2020.06.241

Cited by 6 publications

(7 citation statements)

References 6 publications

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“…The proposed topologies in [19][20][21][22] are configured with the common requirement of three DC sources but the power switch count, model of the conversion unit, and constructional and operational specifications are different. The interest towards the unidirectional switch configured topologies mainly in order to eliminate the uncertainty nature in the procurement cost of the power switches, driver boards, and implementation difficulties involved with the bidirectional switched configurations.…”

Section: Bidirectional Switch Configured Topologiesmentioning

confidence: 99%

“…According to the constructional review of recent MLI topologies, as a solution new symmetric seven-level MLI topology has been introduced in this work as shown in Figure 3. 19 (B) topology VI proposed in, 20 (C) topology VII proposed in, 21 and (D) topology VIII proposed in. 22 2 | PROPOSED SYMMETRIC TOPOLOGY OF MLI…”

Section: Bidirectional Switch Configured Topologiesmentioning

confidence: 99%

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Real time implementation of a new seven level multilevel inverter with design considerations for feasible and reliable operation

Krishnachaitanya

Chitra

2023

Circuit Theory & Apps

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SummaryFuture power electronics is moving towards compact, economical, feasible, and reliable inverters for integration with renewable energy sources and energy efficient drive schemes. Multilevel inverters (MLIs) are becoming more prominent candidates for such medium and high power applications. Though their attractive performance offers a better choice, the real time implementation of MLIs suffer with higher part count, compatibility of bidirectional switches, complementary conditions, number of transitions, polarity conversion module, and reliability. In order to bridge this gap, this work has come up with a new seven level symmetric MLI for utility applications. The abovementioned design parameters have been considered in the proposed MLI that promotes feasible and reliable operation for real time implementation. To defend this proposed topology, recent symmetric seven level MLI topologies have been compared and the results are compiled from constructional, operational, and performance aspects using Matlab/SIMULINK. The performance indices quantified for the analysis include part count, total harmonic distortion (THD), complementary conditions, number of transitions, polarity conversion module, switching losses, and reliability in terms of failure rate. The proposed topology has been validated through real time hardware implementation in which Atmega 2560 microprocessor is deployed for pulse generation.

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Section: Bidirectional Switch Configured Topologiesmentioning

confidence: 99%

Section: Bidirectional Switch Configured Topologiesmentioning

confidence: 99%

Real time implementation of a new seven level multilevel inverter with design considerations for feasible and reliable operation

Krishnachaitanya

Chitra

2023

Circuit Theory & Apps

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“…As well, an analyzes is made in terms of THD generation and total standing voltages of all the configurations [12]. Few drawbacks such as: switch count, voltage imbalance and number of DC sources are there in all the topologies [13].…”

Section: Introductionmentioning

confidence: 99%

Trends and Challenges in Multi-Level Inverter with Reduced Switches

et al. 2021

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Multilevel inverter had been paid a lot of attention from the academia and research community in recent times due to its role in high and medium power applications. In this paper, a detailed survey is made on the recently designed multilevel inverter to find the suitability of the inverters for particular applications. Research is performed on various types of multilevel inverters such as: Symmetric, asymmetric, hybrid and modularized multilevel inverter in order to identify the issues in generating more levels at the output. A summary of various issues in multilevel inverter with reduced switch count is provided, so that a novel topology of multilevel inverter can be designed in future. Further, an 81-level switched ladder multilevel inverter using unidirectional and bidirectional switches is designed. Simulation work is carried out using Matlab/Simulink in order to validate the performance of the inverter with change in resistive load and impedance load. The output of the 81-level inverter is fed to a 110 V, 186.5 W single phase induction motor in order to study the characteristics, further speed control of motor is performed by varying the input voltage of the motor and the results are presented.

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“…In hybrid topology, a fewer number of switching devices with different switching speeds and power ratings are used to achieve a higher number of voltage levels 3 . Some topologies were presented with reduction in the number of switches in symmetrical and asymmetrical configuration to achieve more levels in the output waveform 4‐9 . The grid‐connected applications for feeding real power and reactive power via the photovoltaic system in addition to the mitigation of harmonics were discussed using multilevel inverters 10‐13 .…”

Section: Introductionmentioning

confidence: 99%

“…3 Some topologies were presented with reduction in the number of switches in symmetrical and asymmetrical configuration to achieve more levels in the output waveform. [4][5][6][7][8][9] The grid-connected applications for feeding real power and reactive power via the photovoltaic system in addition to the mitigation of harmonics were discussed using multilevel inverters. [10][11][12][13] To suppress the harmonics produced by the multilevel inverter, many modulation schemes were introduced in the past few years.…”

Section: Introductionmentioning

confidence: 99%

A novel control topology for grid‐integration with modular multilevel inverter

Vanaja¹,

Stonier²,

Moghassemi

2021

Int Trans Electr Energ Syst

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Summary This paper presents a novel control topology for a multilevel inverter with reduced number of power switches for achieving an increased number of levels in output voltage along with improved power quality. The diode clamped multilevel inverter configuration is modified and the gating signals are generated using selective harmonic optimization technique at fundamental frequency using Satin Bower Bird optimization (SBO). It enhances the quality of output voltage waveform with the reduction in total harmonic distortion (THD), less switching power losses, and better efficiency. The inverter is investigated for its competent operation capability on grid‐tied applications. Detailed simulation is conducted and results are presented for various load conditions. To validate the inverter operation, an experimental setup of the modified diode clamped modular inverter (MDCMI) interfacing the grid is presented. The loss analysis is carried out at the inverter and converter segments. Based on the analysis, the proposed control topology demonstrates the reliable and efficient operation of the modular inverter. From the results obtained it is evident that the proposed inverter design suits superlative for the grid applications.

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Simulation analysis of 51-level inverter topology with reduced switch count

Cited by 6 publications

References 6 publications

Real time implementation of a new seven level multilevel inverter with design considerations for feasible and reliable operation

Real time implementation of a new seven level multilevel inverter with design considerations for feasible and reliable operation

Trends and Challenges in Multi-Level Inverter with Reduced Switches

A novel control topology for grid‐integration with modular multilevel inverter

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