Simulation and analysis of the forward bias current–voltage–temperature characteristics of W/4H-SiC Schottky barrier diodes for temperature-sensing applications

Zeghdar, Kamal; Bencherif, H.; Dehimi, L.; Pezzimenti, F.; Corte, Francesco G. Della

doi:10.1016/j.ssel.2020.08.001

Cited by 5 publications

(1 citation statement)

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“…In particular, a mesh spacing down to 0.5 nm is imposed around the MOSFET p-n junctions and within the channel region. For the models in Table 2, all the reference parameters are reported in recent papers of ours focused on different 4H-SiC-based devices and supported by experimental results [14,[33][34][35][36][37][38].…”

Section: Model Expressionsupporting

confidence: 61%

Study and Assessment of Defect and Trap Effects on the Current Capabilities of a 4H-SiC-Based Power MOSFET

et al. 2021

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A numerical simulation study accounting for trap and defect effects on the current-voltage characteristics of a 4H-SiC-based power metal-oxide-semiconductor field effect transistor (MOSFET) is performed in a wide range of temperatures and bias conditions. In particular, the most penalizing native defects in the starting substrate (i.e., EH6/7 and Z1/2) as well as the fixed oxide trap concentration and the density of states (DoS) at the 4H-SiC/SiO2 interface are carefully taken into account. The temperature-dependent physics of the interface traps are considered in detail. Scattering phenomena related to the joint contribution of defects and traps shift the MOSFET threshold voltage, reduce the channel mobility, and penalize the device current capabilities. However, while the MOSFET on-state resistance (RON) tends to increase with scattering centers, the sensitivity of the drain current to the temperature decreases especially when the device is operating at a high gate voltage (VGS). Assuming the temperature ranges from 300 K to 573 K, RON is about 2.5 MΩ·µm2 for VGS > 16 V with a percentage variation ΔRON lower than 20%. The device is rated to perform a blocking voltage of 650 V.

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