Simulation and measurement of total ionizing dose radiation induced image lag increase in pinned photodiode CMOS image sensors

Abstract

11This paper presents an investigation of total ionizing dose (TID) induced image lag sources in pinned photodiodes (PPD) CMOS 12image sensors based on radiation experiments and TCAD simulation. The radiation experiments have been carried out at the Cobalt 13 -60 gamma-ray source. The experimental results show the image lag degradation is more and more serious with increasing TID. 14 Combining with the TCAD simulation results, we can confirm that the junction of PPD and transfer gate (TG) is an important region 15 forming image lag during irradiation. These simulations demonstrate that TID can generate a potential pocket leading to incomplete 16transfer. 17 18Keywords-CMOS image sensors; total ionizing dose; image lag; pinned photodiodes 19 20 21

Total-Ionizing Dose Effects on Charge Transfer Efficiency and Image Lag in Pinned Photodiode CMOS Image Sensors

“…6(a)], the transfer before irradiation is limited by the barrier in the middle of the TG and the pixel exhibits very good lag performances when nonirradiated (CTI ∼ 0.05%). After TID of 0.1 kGy(SiO 2 ), the CTI increase is mostly due to the modification of the potential in the PPD-TG interface where a potential pocket is created (simulation of this effect is reported in [6]) as illustrated by the blue line in Fig. 6(a).…”

“…However, other parameters deteriorate under irradiation exposure. The charge transfer in PPD CIS can be enhanced or degraded (depending on the limiting lag causes in the nonirradiated device) by the TID-induced-trapped positive charges in the TG spacer vicinity [3], [6]. Moreover, the positive-trapped charges and interface states in the PMD lead to an increase of the pinning voltage, whereas the TIDinduced-trapped charges in the TG STI sidewalls generate a TG subthreshold leakage leading to full well capacity (FWC) reduction [3].…”

Mitigating charge spill-back induced image lag with a multi-level transfer gate pulse in PPD image sensors

“…At low signal levels image lag is dominated by incomplete transfer of electrons, due to potential barriers or "pockets" in the transfer path 8 . At higher levels of illumination, the main source of lag is charge spill-back 9 , which also has an adverse effect on linearity 10 .…”