Simulation comparison of InGaP/GaAs HBT thermal performance in wire-bonding and flip-chip technologies

d’Alessandro, V.; Catalano, Antonio Pio; Magnani, Alessandro; Codecasa, Lorenzo; Rinaldi, N.; Moser, B.; Zampardi, P.J.

doi:10.1016/j.microrel.2017.09.011

Cited by 24 publications

(8 citation statements)

References 24 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The simulated devices under test (DUTs) are mesa‐isolated single‐emitter NPN HBTs, manufactured by Qorvo for testing purposes on a 625 μm‐thick GaAs substrate with an HBT‐only process . Figure depicts two angled top views, which show that the DUTs are designed with a ground‐signal‐ground (GSG) pad configuration for experimental characterization through a probing station equipped with RF probes.…”

Section: Devices Under Testmentioning

confidence: 99%

“…The core of the tool is represented by an in‐house MATLAB routine, , as will be clarified shortly. The layout of electronic devices, usually stored in the Graphic Data System (GDS) files, comprises a defined number of layers, each corresponding to a mask of the technology process.…”

Section: Fem‐based Tool and Simulation Approachmentioning

confidence: 99%

“…The BCs, the HS position, and the thermal conductivities are straightforwardly defined within the routine. Nonlinear thermal effects are not accounted for in the analysis described in Section since under normal operation they can be disregarded; nevertheless, they can in principle be activated to describe reliability testing conditions …”

Section: Fem‐based Tool and Simulation Approachmentioning

confidence: 99%

“…In this paper, the system response is represented by the device thermal resistance R TH , while the KIVs are the 5 thicknesses of semiconductor and metallization layers reported in Table . The DOE procedure was performed for each combination of W E and L E , which allowed obtaining six sets of coefficients [K/W] (the values of which are reported in Section ) for the R TH model given in previous studies

R_{TH} = R_{italicTH, italicref} + R_{italicTH a} \cdot a + R_{italicTH b} \cdot b + R_{italicTH c} \cdot c + R_{italicTH d} \cdot d + R_{italicTH e} \cdot e + + R_{italicTH italicab} \cdot ((), a \cdot b) + R_{italicTH italicac} \cdot ((), a \cdot c) + R_{italicTH italicad} \cdot ((), a \cdot d) + R_{italicTH italicae} \cdot ((), a \cdot e) + R_{italicTH italicbc} \cdot ((), b \cdot c) + + R_{italicTH italicbd} \cdot ((), b \cdot d) + R_{italicTH italicbe} \cdot ((), b \cdot e) + R_{italicTH italiccd} \cdot ((), c \cdot d) + R_{italicTH italicce} \cdot ((), c \cdot e) + R_{italicTH italicde} \cdot ((), d \cdot e) + + R_{italicTH italicabc} \cdot ((), a \cdot b \cdot c) + R_{italicTH italicabd} \cdot ((), a \cdot b \cdot d) + R_{italicTH italicabe} \cdot ((), a \cdot b \cdot e) + R_{italicTH italicacd} \cdot ((), a \cdot c \cdot d) + R_{italicTH italicace} \cdot ((), a \cdot c \cdot e) + + R_{italicTH italicade} \cdot ((), a \cdot<...>)

…”

Section: Design Of Experimentsmentioning

confidence: 99%

“…Recently, the upward heat flow has been given attention in some works from the authors . In particular, besides the metallization, the often overlooked role played by the emitter stack (previously investigated only in a study by Anholt) has been analyzed in a state‐of‐the‐art InGaP/GaAs HBTs in previous papers; the relevance of these studies is driven by the low thermal conductivities of the ternary InGaAs and InGaP emitter layers (even lower than GaAs), which make thermal shunt solutions less effective. For this purpose, the authors have used a simulation/modeling strategy based on combining (1) a tool that relies on a 3‐D finite‐element method (FEM) software package aided by an in‐house routine, and (2) Design of Experiments (DOE) to analytically derive a predictive thermal resistance model starting from a minimized number of FEM results.…”

Section: Introductionmentioning

confidence: 99%

See 4 more Smart Citations

Accurate and efficient analysis of the upward heat flow in InGaP/GaAs HBTs through an automated FEM‐based tool and Design of Experiments

d’Alessandro

Catalano

Codecasa

et al. 2018

Int J Numerical Modelling

Self Cite

View full text Add to dashboard Cite

This paper presents an extensive analysis aimed at quantifying the impact of all the key technology parameters on the upward heat flow in state-of-the-art InGaP/GaAs heterojunction bipolar transistors (HBTs) for various emitter areas and shapes. Extremely accurate thermal simulations are conducted in a relatively short time with a tool relying on a commercial 3-D finite-element method (FEM) solver and an in-house routine for automated geometry construction, optimized mesh generation, sequential solution, and data storing/processing. Design of Experiments is used to define a thermal resistance model as a function of the aforementioned parameters on the basis of a few FEM data. also studied the beneficial effect of a thermally-conductive and/or shorter path from the heat dissipation region to the sink, which can be obtained with flip-chip packaging 13,14,19,20,22,30 or alternative strategies based on thermal vias. 17,32 Unfortunately, almost all the thermal analyses presented in the above papers are (sometimes unacceptably) inaccurate: the real-and complex-device structures are always represented with simplified (or even oversimplified) domains to allow (1) the development of analytical models for the temperature distribution or (2) an easy construction/meshing of the 3-D geometry for numerical simulations; still now, in spite of the continuous improvement in PC performances, task (2) is not trivial if performed manually, especially when all technological details must be taken into account.Recently, the upward heat flow has been given attention in some works from the authors. [37][38][39][40] In particular, besides the metallization, the often overlooked role played by the emitter stack (previously investigated only in a study by Anholt 22 ) has been analyzed in a state-of-the-art InGaP/GaAs HBTs in previous papers [38][39][40] ; the relevance of these studies is driven by the low thermal conductivities of the ternary InGaAs and InGaP emitter layers (even lower than GaAs), which make thermal shunt solutions less effective. For this purpose, the authors have used a simulation/modeling strategy based on combining (1) a tool that relies on a 3-D finite-element method (FEM) software package aided by an in-house routine, and (2) Design of Experiments (DOE) to analytically derive a predictive thermal resistance model starting from a minimized number of FEM results. Contrary to prior work, the proposed tool ensures very high simulation accuracy: starting from the actual masks used for device fabrication, it allows an automated and extremely detailed construction/meshing of the 3-D transistor structure in the environment of the FEM solver. Thanks to this feature, it can be easily integrated into a standard design process, and can in principle be used for any device technology.This work aims at extending the analysis presented in Catalano et al 38 where the impact of emitter stack and metallization layers on the thermal behavior was evaluated for various emitter areas and shapes in single-finger InGaP/GaAs HBTs. Compared wi...

show abstract

Section: Devices Under Testmentioning

confidence: 99%

Section: Fem‐based Tool and Simulation Approachmentioning

confidence: 99%

Section: Fem‐based Tool and Simulation Approachmentioning

confidence: 99%