Simulation of ESD protection devices in an advanced CMOS technology using a TCAD workbench based on an ESD calibration methodology

Cilento, Tommaso; Schenkel, Michael; Yun, Choong-Mo; Mishra, Rahul; Li, Junjun; Chatty, K.; Gauthier, Robert

doi:10.1016/j.microrel.2010.07.132

Cited by 6 publications

(6 citation statements)

References 3 publications

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“…The main problem is the current filamentation, which leads to non-uniform conduction and localized heating causing thermal failure. TCAD simulations of devices under ESD stress conditions have a long tradition and are generally accepted as a very important step in designing robust devices and ICs [16][17][18].…”

Section: Esd and Latch-upmentioning

confidence: 99%

TCAD for reliability

Pfäffli

Tikhomirov

et al. 2012

Microelectronics Reliability

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Section: Esd and Latch-upmentioning

confidence: 99%

TCAD for reliability

Pfäffli

Tikhomirov

et al. 2012

Microelectronics Reliability

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“…N-chip electrostatic discharge (ESD) protection is required for ICs against ESD failures. On-chip ESD protection design becomes very challenging for high-performance and complex chips fabricated at advanced technology nodes [1][2][3][4][5]. Full-chip ESD protection design verification and prediction are the ultimate goal in practical ESD protection designs, which can only be achieved by careful ESD CAD simulation.…”

Section: Introductionmentioning

confidence: 99%

“…Full-chip ESD protection design verification and prediction are the ultimate goal in practical ESD protection designs, which can only be achieved by careful ESD CAD simulation. These days, TCAD-based ESD simulation design method has been commonly used for ESD design optimization [4]. One critical decision to make in conducting TCAD ESD design simulation is to decide what input ESD stimulus to use to ensure accurate simulation of real-world ESD stressing events at chip level in order to avoid the possible "junk-in, junk-out" situation.…”

Section: Introductionmentioning

confidence: 99%

ESD Design Verification Aided by Mixed-Mode Multiple-Stimuli ESD Simulation

Di¹,

Pan

et al. 2021

IEEE J. Electron Devices Soc.

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Electrostatic discharge (ESD) protection is a grand design challenge for complex ICs in advanced technologies. ESD simulation is indispensable to guide ESD protection designs. However, no existing ESD simulation methods may accurately predict ESD protection designs in a universal manner due to various inherent limitations. TCAD-based ESD simulation is very useful for ESD protection designs. Transmission line pulse (TLP) and very fast TLP (VFTLP) are widely used to evaluate human body model (HBM) and charged device model (CDM) ESD protection designs, which provide rich details for calibrating TCAD ESD simulation for design prediction and validation. Using various ESD protection devices fabricated in 28nm CMOS and 45nm SOI CMOS technologies, a comprehensive experimental and simulation study finds that the ESD stimuli used in TCAD ESD design simulation have profound impacts on many subtle ESD protection behaviors, particularly in comparison with ESD testing. This study cautions against over-interpretation of TCAD ESD simulation results, obtained using any specific ESD stimulus, attempting to accurately predict practical ESD protection designs. A mixed-mode multiple-stimuli ESD simulation method is therefore developed to address the ESD stimulus induced ESD performance variation, hence offering a technique to achieve ESD protection design prediction.

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“…Over the last few decades, the robust development methodology and optimization of ESD protection devices have been extensively studied and reported [2][3][4][5][6][7]. However, these studies of the ESD behavior were concentrated on single protection device characteristics; the mutual ESD behavior between several devices has not yet been clarified.…”

Section: Introductionmentioning

confidence: 99%

“…In this work, we report on the mutual ESD behavior dependency between multiple devices (NMOS) under Transmission Line Pulse (TLP, 100 ns square pulse) stress and its effect on the ESD robustness. In order to take into account the interrelation between the protection devices, the mixed-mode 3D TCAD simulation approach is employed [2]. Circuit diagrams and device layouts for the single and mixed-mode test are presented in Figs.…”

Section: Introductionmentioning

confidence: 99%

Transient 3-D TCAD simulation of multiple snapback event in mixed-mode test for mutual relation between protection devices

Kwon

Lee

Kim

et al. 2015

2015 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)

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Mutual ESD behavior dependency between multiple devices under Transmission Line Pulse stress was investigated using transient 3-D TCAD simulation. Interestingly, the transient response of drain voltage has multiple snapback profiles in the mixed-mode test. When one of the devices in the mixed-mode test is turned on, the current waveform of the other adjacent devices shows snapback profile. This mutual relation between protection devices affects the ESD robustness. If there is a big imbalance of individual ESD characteristics between the devices under the mixed-mode test, the lattice temperature hotspot and failure may occurs in the device even though the robustness of the other connected device is lower than that of the device in the single-device test.

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Simulation of ESD protection devices in an advanced CMOS technology using a TCAD workbench based on an ESD calibration methodology

Cited by 6 publications

References 3 publications

TCAD for reliability

TCAD for reliability

ESD Design Verification Aided by Mixed-Mode Multiple-Stimuli ESD Simulation

Transient 3-D TCAD simulation of multiple snapback event in mixed-mode test for mutual relation between protection devices

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