Simulation Of Total Ionizing Dose Effects Technique for CMOS Inverter Circuit

Abstract

The total ionizing dose (TID) effect significantly impacts the electrical parameters of fully depleted silicon on insulator (FDSOI) devices and even invalidates the on-off function of devices. At present, most of the irradiation research on the circuit level is focused on the single event effect, and the research on the total ionizing dose effect is very little. Therefore, this study mainly analyzes the influence of TID effects on a CMOS inverter circuit based on 22 nm FDSOI transistors. First, we constructed and calibrated an N-type FDSOI metal-oxide semiconductor (NMOS) structure and P-type FDSOI metal-oxide semiconductor (PMOS) structure. The transfer characteristics and trapped charge distribution of these devices were studied under different irradiation doses. Next, we studied the TID effect on an inverter circuit composed of these two MOS transistors. The simulation results show that when the radiation dose is 400 krad (Si), the logic threshold drift of the inverter is approximately 0.052 V. These results help further investigate the impact on integrated circuits in the irradiation environment.