Simulation of Wire Bonding Process Using Explicit Fem with Ale Remeshing Technology

Abstract

Thermosonic wire bonding is a common fabrication process for connecting devices in electronic packaging. However, when the free air ball (FAB) is compressed onto the I/O pad of the chip during bonding procedure, chip cracking may occur if the contact pressure is too large. This study proposes an effective simulation technique that can predict the wire ball geometry after bonding in an accurate range. The contact force obtained in the simulation can be used for possible die cracking behavior evaluation. The simulation in this study used the explicit time integration scheme to deal with the time marching problem, and the second-order precision arbitrary Lagrangian-Eulerian (ALE) algorithm was used to deal with the large deformation of the wire ball during the bonding process. In addition, the equilibrium smoothing algorithm in LS-DYNA can make the contact behavior and geometry of the bonding wire almost the same as the experiment, which can also significantly reduce the distortion of the mesh geometry after remeshing.

An Overview of AI-Assisted Design-on-Simulation Technology for Reliability Life Prediction of Advanced Packaging

“…With the increasing complexity of packaging structures, manufacturing reliability test vehicles, and conducting ATCT experiments have become time-consuming and very expensive processes, the design-on-experiment (DoE) methodology for packaging design is becoming infeasible. As a result of the wide adoption of finite element analysis [ 9 , 10 , 11 , 12 , 13 , 14 , 15 ], accelerated thermal cycling tests are reduced significantly in the semiconductor industry, and package development time and cost are reduced as well. In a 3D WLP model, Liu [ 16 ] applied the Coffin–Manson life prediction empirical model to predict the reliability life of a solder joint within an accurate range.…”

Reliability Evaluation of Fan-Out Type 3D Packaging-On-Packaging

“…The Coffin–Manson strain-based empirical model is widely used to estimate the fatigue life of solder joints, and the empirical equation [ 16 , 17 , 18 ] is as follows: where is the mean time to failure (MTTF), and C and are material constants, usually obtained experimentally. In our model and for SAC305 solder material, these are 0.235 and 1.75, respectively [ 10 , 11 , 12 ]. The incremental equivalent inelastic strain in each temperature cycle, , is defined as follows: where , , , , , and are the incremental inelastic strains in the x, y , and z directions and the incremental inelastic shear strain in the xy, yz , and zx directions, respectively.…”

“…However, before mass production, packaging must pass reliability life testing under thermal cycling loading; in the JEDEC(Joint Electron Device Engineering Council) standard (JESD22-A104D), the thermal range is −40 to 125 °C. Finite element analysis is widely used to optimize package structures [ 7 , 8 , 9 , 10 , 11 , 12 ]. In this study, we proposed an FO-WLP with a glass substrate architecture and used it as a PoP.…”

Theoretical and Experimental Investigation of Warpage Evolution of Flip Chip Package on Packaging during Fabrication

“…SiP technology may have a two-dimensional (2D) planar configuration, a threedimensional (3D) vertical stacking configuration, or an integrated (hybrid) configuration. 3D packaging technology can be categorized into package stacking, like package-onpackage (PoP) and package-in-package (PiP), wire-bonding [6], and through silicon via (TSV)-based 3D IC stacking [7]. In addition to high I/O quantity and miniaturization, further requirements of multi-functionality have aroused the development of the flip chip Materials 2021, 14, 4816 2 of 17 package-on-package (FCPoP) technology.…”