Single-chip photonic transceiver based on bulk-silicon, as a chip-level photonic I/O platform for optical interconnects

Abstract

When silicon photonic integrated circuits (PICs), defined for transmitting and receiving optical data, are successfully monolithic-integrated into major silicon electronic chips as chip-level optical I/Os (inputs/outputs), it will bring innovative changes in data computing and communications. Here, we propose new photonic integration scheme, a single-chip optical transceiver based on a monolithic-integrated vertical photonic I/O device set including light source on bulk-silicon. This scheme can solve the major issues which impede practical implementation of silicon-based chip-level optical interconnects. We demonstrated a prototype of a single-chip photonic transceiver with monolithic-integrated vertical-illumination type Ge-on-Si photodetectors and VCSELs-on-Si on the same bulk-silicon substrate operating up to 50 Gb/s and 20 Gb/s, respectively. The prototype realized 20 Gb/s low-power chip-level optical interconnects for λ ~ 850 nm between fabricated chips. This approach can have a significant impact on practical electronic-photonic integration in high performance computers (HPC), cpu-memory interface, hybrid memory cube, and LAN, SAN, data center and network applications.

Device characterization of the VCSEL-on-silicon as an on chip light source

“…Also, this platform is compatible to standard complementary metal-oxide semiconductor (CMOS) technology. However, most of electronic integrated circuits (ICs) are based on bulk-Si [12,13]. Therefore, the bulk silicon photonics platforms to overcome this substrate incompatibility are of interest [12][13][14][15][16].…”

100 Gb/s photoreceiver module based on 4ch × 25 Gb/s vertical-illumination-type Ge-on-Si photodetectors and amplifier circuits

“…There have been reports on silicon photonic receivers where Ge waveguide (WG) PDs on SOI substrates and CMOS Rx ICs were monolithic-or hybrid-integrated [2,[28][29][30][31][32][33][34][35][36]. In general, most of reported Ge PDs are waveguide-type defined on SOI [2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][25][26][27][28][29][30][31][32][33][34], whereas most of CMOS ICs are based on bulk silicon technology. On the other hand, vertical-illumination Ge PDs are defined on bulk silicon [6,9,22,[24][25][26], and are of interest since they can enable the monolithic integration with bulk CMOS ICs more realistic, and have a big advantage in packaging with optical fiber.…”

“…In general, most of reported Ge PDs are waveguide-type defined on SOI [2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][25][26][27][28][29][30][31][32][33][34], whereas most of CMOS ICs are based on bulk silicon technology. On the other hand, vertical-illumination Ge PDs are defined on bulk silicon [6,9,22,[24][25][26], and are of interest since they can enable the monolithic integration with bulk CMOS ICs more realistic, and have a big advantage in packaging with optical fiber. However, it is rarely reported, since simultaneous achievement of both high-speed and high-responsivity characteristics in a vertical-illumination type PD is difficult due to the trade-off between responsivity and speed of the device [24][25][26].…”

“…Recently, there has been remarkable progress in Ge-on-Si photodetectors (Ge PDs) [14][15][16][17][18][19][20][21][22][23][24][25][26], which are the main active components in silicon optical receivers, and also in CMOS ICs for optical/electrical (O/E) interface and all-silicon photonic/CMOS receivers [6][7][8][9][28][29][30][31][32][33][34]. There have been reports on silicon photonic receivers where Ge waveguide (WG) PDs on SOI substrates and CMOS Rx ICs were monolithic-or hybrid-integrated [2,[28][29][30][31][32][33][34][35][36].…”

“…For the next-generation high-speed data communication and interconnect systems operating over 100 Gb/s, silicon photonics is regarded as a promising technology, providing cost-effective optical devices based on mature silicon CMOS fabrication technology [1][2][3][4][5][6][7][8][9][10][11][12][13]. For the pursuit of high-speed and energy-efficient silicon photonic receivers, which are the core components of the silicon-based optical communication systems, intensive efforts have been made to progress efficient silicon photonic device sand CMOS interface circuit.…”