Single-Crystal Islands (SCI) for Monolithic 3-D and Back-End-of-Line FinFET Circuits

Liu, Yuwei; Hu, Han‐Wen; Hsieh, Ping-Yi; Chung, Hao-Tung; Chang, Shan-Chwen; Liu, Jui-Han; Huang, Po-Tsang; Yang, Chih-Chao; Shen, Chang‐Hong; Shieh, Jia‐Min; Chen, Kuan‐Neng; Hu, Chenming

doi:10.1109/ted.2021.3101180

Cited by 6 publications

(3 citation statements)

References 17 publications

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“…The above results show that the top silicon of the “exposed vertical nanosheet” changed from having a right-angled surface to a curved surface. This result shows that the top silicon of the nanosheet underwent a recrystallization process of “a-Si (solid)-Si (liquid)-c-Si (solid)” [ 20 , 21 ]. Moreover, it can be seen that the surface morphology of the ring-shaped recrystallized nanosheet was relatively uniform, and no apparent cracks appeared.…”

Section: Resultsmentioning

confidence: 99%

High-Quality Recrystallization of Amorphous Silicon on Si (100) Induced via Laser Annealing at the Nanoscale

Chen

Zhu

Wang³

et al. 2023

Nanomaterials

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At sub-3 nm nodes, the scaling of lateral devices represented by a fin field-effect transistor (FinFET) and gate-all-around field effect transistors (GAAFET) faces increasing technical challenges. At the same time, the development of vertical devices in the three-dimensional direction has excellent potential for scaling. However, existing vertical devices face two technical challenges: “self-alignment of gate and channel” and “precise gate length control”. A recrystallization-based vertical C-shaped-channel nanosheet field effect transistor (RC-VCNFET) was proposed, and related process modules were developed. The vertical nanosheet with an “exposed top” structure was successfully fabricated. Moreover, through physical characterization methods such as scanning electron microscopy (SEM), atomic force microscopy (AFM), conductive atomic force microscopy (C-AFM) and transmission electron microscopy (TEM), the influencing factors of the crystal structure of the vertical nanosheet were analyzed. This lays the foundation for fabricating high-performance and low-cost RC-VCNFETs devices in the future.

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Section: Resultsmentioning

confidence: 99%

High-Quality Recrystallization of Amorphous Silicon on Si (100) Induced via Laser Annealing at the Nanoscale

Chen

Zhu

Wang³

et al. 2023

Nanomaterials

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“…To address this challenge, an innovative technique known as the singlecrystal island (SCI) method has been proposed. [20][21][22] This method combines a cooling hole structure with nanosecond pulse laser crystallization to produce Si SCIs within monolithic 3DIC back-end-of-line (BEOL) FinFET circuits. To further enhance the technology, our study integrates seeding structures with precise designs to exert control over the crystal orientation of these SCIs.…”

Section: Introductionmentioning

confidence: 99%

Advancements in single-crystal silicon with elevated-laser-liquid-phase-epitaxy (ELLPE) for monolithic 3D ICs

Shih,

Pan,

Chung

et al. 2024

Jpn. J. Appl. Phys.

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In this study, we present a low thermal budget Elevated-Laser-Liquid-Phase-Epitaxy (ELLPE) technique designed for the precise fabrication of single-crystal islands (SCIs) intended for use in middle-end-of-line (MEOL) FinFETs. Each of these single-crystal islands features a (100) orientation tended from Si seeding structure and is successfully integrated as channel materials in the MEOL circuit of a monolithic 3D integrated circuit (3DIC). This technique effectively mitigates the typical performance disparities associated with poly-Si channel materials in upper tiers, addressing a significant challenge in advanced electronic device fabrication and potentially enhancing the performance and reliability of MEOL FinFETs in monolithic 3DIC.

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“…Much work has been undertaken to circumvent the thermal budget limitation. For instance, nanosecond laser annealing (NLA) [ 6 ] and solid-phase epitaxial regrowth (SPER) [ 7 ] were used to activate S/D as the alternatives to high-temperature spike annealing and low-temperature materials, such as poly-Si [ 8 , 9 ], Ge [ 10 , 11 ], III-V [ 12 , 13 ] and transparent amorphous oxide [ 14 , 15 ] were implemented to replace monocrystalline Si as the channel of top-tier devices. Particularly interesting is the exploration of junctionless MOSFETs as the top-tier devices with the elimination of S/D activation [ 16 , 17 ].…”

Section: Introductionmentioning

confidence: 99%

Low-Temperature (≤500 °C) Complementary Schottky Source/Drain FinFETs for 3D Sequential Integration

Mao

Gao

et al. 2022

Nanomaterials

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In this work, low-temperature Schottky source/drain (S/D) MOSFETs are investigated as the top-tier devices for 3D sequential integration. Complementary Schottky S/D FinFETs are successfully fabricated with a maximum processing temperature of 500 °C. Through source/drain extension (SDE) engineering, competitive driving capability and switching properties are achieved in comparison to the conventional devices fabricated with a standard high-temperature (≥1000 °C) process flow. Schottky S/D PMOS exhibits an ON-state current (ION) of 76.07 μA/μm and ON-state to OFF-state current ratio (ION/IOFF) of 7 × 105, and those for NMOS are 48.57 μA/μm and 1 × 106. The CMOS inverter shows a voltage gain of 18V/V, a noise margin for high (NMH) of 0.17 V and for low (NML) of 0.43 V, with power consumption less than 0.9 μW at VDD of 0.8 V. Full functionality of CMOS ring oscillators (RO) are further demonstrated.

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Single-Crystal Islands (SCI) for Monolithic 3-D and Back-End-of-Line FinFET Circuits

Cited by 6 publications

References 17 publications

High-Quality Recrystallization of Amorphous Silicon on Si (100) Induced via Laser Annealing at the Nanoscale

High-Quality Recrystallization of Amorphous Silicon on Si (100) Induced via Laser Annealing at the Nanoscale

Advancements in single-crystal silicon with elevated-laser-liquid-phase-epitaxy (ELLPE) for monolithic 3D ICs

Low-Temperature (≤500 °C) Complementary Schottky Source/Drain FinFETs for 3D Sequential Integration

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