Single Electron Transistor Based Current Mirror: Modelling and Performance Characterization

Vidhate, Ashok D.; Suman, Shruti

doi:10.21272/jnep.13(1).01017

Cited by 2 publications

(2 citation statements)

References 12 publications

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“…Three categories exist for MOSFETs: category-1, which integrates with current CMOS technology for lower power dissipation [12], [13]; category-2, which uses alternate channel materials for higher charge carrier velocity and mobility [14], [15]; and category-3, which includes new devices for specialized tasks [16], [17]. A promising nano-scale device that can be co-integrated with CMOS technology to improve performance is the single electron transistor (SET) [18].…”

Section: Figure 1 Moore's Law Applied To Technology Trendmentioning

confidence: 99%

Analytical Modelling and Performance Characterization of Hybrid SET-MOS

Shruti Suman

2024

jes

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Gordon Moore's "Moore's Law" suggests chip functionality demand doubles every 1.5-2 years, with global semiconductor technology roadmap recommending sub-nanometer ranges for IC production in nano-electronics. The single electron transistor (SET) is a promising nano-scale device that can be co-integrated with CMOS technology to improve performance. The paper explores the tunnelling effect between nanoparticles in single electron transistors (SET), revealing coulomb blockade transactions and resistance increases with reduced bias. It focuses on single electron transistors and pre-terminal devices, discussing IV characteristics, coulomb diamond plots, and metallic quantum dots. This research also explores the hybrid SET-FET based model, focusing on developing a room temperature SET in CMOS comparable technology with a Field Effect Transistor (FET). Prediction models and exploratory studies guide the integration of SET-FET technology. SIMON is a comprehensive simulator designed for single-electron devices and circuits. The output current is not impacted by capacitances up to 1 pF, and FET size in the micron range are appropriate for SET signal amplification up to 4 µA. This research explores the modelling of SET-FET technology in highlighting its ability to mitigate drawbacks in low drive current when combined with a FET. It also explores device variability mitigation in nanoscale array configurations, finding that SET-FET significantly reduces variability in larger arrays, despite the impact of capacitance and resistance.

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Section: Figure 1 Moore's Law Applied To Technology Trendmentioning

confidence: 99%

Analytical Modelling and Performance Characterization of Hybrid SET-MOS

Shruti Suman

2024

jes

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“…created a workable model for silicon SET at initial instance [36]. This model would be very helpful for assessing the execution of realistic SET-MOS hybrid circuits because it was designed in accordance with the realistic SET [37], [36], [37], [38], [39], [40].…”

Section: Reviewmentioning

confidence: 99%

Analytical Modelling and Performance Characterization of Single Electron Transistor

Shruti Suman

2024

jes

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One important component of the present nanotechnology research field is single electron transistor (SET) which has unrealized quality to operate at breakneck speeds with ultralow power consumption. The single electron transistor is a novel nanoscale switching device that can regulate the motion of a single electron in addition to maintaining its scalability down to the atomic level. In this context, scalability refers to the ability of electronic device to function better as their dimensions get smaller. The basic device properties that this single electron transistor (SET) operates on "quantized current-voltage (I-V) characteristic," "single electron tunneling effect," and "Coulomb blockade," are also covered. This study presents some of the key SET-related topics, such as modelling and simulation methods. Simulation of Nanostructures Method (SIMON) is circuit simulator for tunneling device with just a single electron device based on Monte Carlo approach. It enables simulation of any kind of circuits with voltage source, junctions in tunnels and capacitors in quasi stationary mode and transient mode. The most significant feature of SET that is applied in the research work is Coulomb blockade oscillation, so at the conclusion of this paper, a number of simulations utilizing the SIMON simulator are shown. The simulation results show that for gate capacitance CG = 2af, C∑ = 3af, IBIAS = 2nA, tunnel barrier resistance RT > 4.1KΩ and operating temperature T=21K the model reflects real SET characteristic with maximum voltage gain.

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Single Electron Transistor Based Current Mirror: Modelling and Performance Characterization

Cited by 2 publications

References 12 publications

Analytical Modelling and Performance Characterization of Hybrid SET-MOS

Analytical Modelling and Performance Characterization of Hybrid SET-MOS

Analytical Modelling and Performance Characterization of Single Electron Transistor

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