2022
DOI: 10.1109/ted.2021.3137135
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Single Event Burnout Hardening Technique for High-Voltage p-i-n Diodes With Field Limiting Rings Termination Structure

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Cited by 13 publications
(2 citation statements)
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“…It can be concluded that x 0 = 40 μm is the most sensitive incident position with the lowest V th,SEB of 164 V. Therefore, x 0 = 40 μm is selected as the default incident position in our following simulations so as to obtain the worst case for SEB. In addition, it should also be pointed out that we regard the SEB failure criterion as the maximum lattice temperature of the device after the ion strike reaches the melting point of silicon (1688 K) [ 9 , 20 ].…”
Section: Resultsmentioning
confidence: 99%
“…It can be concluded that x 0 = 40 μm is the most sensitive incident position with the lowest V th,SEB of 164 V. Therefore, x 0 = 40 μm is selected as the default incident position in our following simulations so as to obtain the worst case for SEB. In addition, it should also be pointed out that we regard the SEB failure criterion as the maximum lattice temperature of the device after the ion strike reaches the melting point of silicon (1688 K) [ 9 , 20 ].…”
Section: Resultsmentioning
confidence: 99%
“…LCLC has been widely accepted as an effective heavy-ion irradiation hardening method for electronic devices [31][32][33][34]. The method of LCLC is to control the local recombination rate by introducing the additional recombination centers within the structure.…”
Section: Analysis Of Lclc Hardening Mechanism In Ga 2 O 3 Finfetmentioning
confidence: 99%